From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752136AbcCYIuV (ORCPT ); Fri, 25 Mar 2016 04:50:21 -0400 Received: from down.free-electrons.com ([37.187.137.238]:46340 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752038AbcCYIuS (ORCPT ); Fri, 25 Mar 2016 04:50:18 -0400 Date: Fri, 25 Mar 2016 09:50:15 +0100 From: Boris Brezillon To: Peter Pan Cc: computersforpeace@gmail.com, dwmw2@infradead.org, linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, karlzhang@micron.com, beanhuo@micron.com, xuejiancheng@huawei.com, Peter Pan Subject: Re: [PATCH 00/11] mtd: nand_bbt: introduce independent nand BBT Message-ID: <20160325095015.341a11eb@bbrezillon> In-Reply-To: <1457923684-13505-1-git-send-email-peterpandong@micron.com> References: <1457923684-13505-1-git-send-email-peterpandong@micron.com> X-Mailer: Claws Mail 3.12.0 (GTK+ 2.24.28; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 14 Mar 2016 02:47:53 +0000 Peter Pan wrote: > Sorry for send the v3 out late. I went through a busy time in the past > two month. > > Currently nand_bbt.c is tied with struct nand_chip, and it makes other > NAND family chips hard to use nand_bbt.c. Maybe it's the reason why > onenand has own bbt(onenand_bbt.c). > > Separate struct nand_chip from BBT code can make current BBT shareable. > We create struct nand_bbt to take place of nand_chip in nand_bbt.c. > Struct nand_bbt contains all the information BBT needed from outside and > it should be embedded into NAND family chip struct (such as struct nand_chip). > > Below is mtd folder structure we want: > drivers/mtd/nand/ > drivers/mtd/nand/raw/ > drivers/mtd/nand/spi/ > drivers/mtd/nand/onenand/ > drivers/mtd/nand/chips/ Hm, we should have a chips directory under each interface type, because vendor specific handling is dependent on the NAND interface. Otherwise, yes, that's the idea. -- Boris Brezillon, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com