From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754653AbcC3Vc3 (ORCPT ); Wed, 30 Mar 2016 17:32:29 -0400 Received: from muru.com ([72.249.23.125]:49523 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752085AbcC3Vc2 (ORCPT ); Wed, 30 Mar 2016 17:32:28 -0400 Date: Wed, 30 Mar 2016 14:32:25 -0700 From: Tony Lindgren To: Keerthy Cc: linux-omap@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, galak@codeaurora.org, mark.rutland@arm.com, Lokesh Vutla , Tero Kristo Subject: Re: [PATCH v2] ARM: dts: dra7: Correct clock tree for sys_32k_ck Message-ID: <20160330213224.GH9329@atomide.com> References: <1457957001-720-1-git-send-email-j-keerthy@ti.com> <20160330211828.GE9329@atomide.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20160330211828.GE9329@atomide.com> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org * Tony Lindgren [160330 14:19]: > * Keerthy [160314 05:04]: > > This is w.r.t J6/J6eco: 32clk is pseudo (erratum i856) - clock source. > > Errata i856 for the AM572x (DRA7xx) points out that the 32.768KHz external > > crystal is not enabled at power up. Instead the CPU falls back to using > > an emulation for the 32KHz clock which is SYSCLK1/610. SYSCLK1 is usually > > 20MHz on boards so far (which gives an emulated frequency of 32.786KHz) > > Thanks applying into omap-for-v4.6/fixes. Actually let's wait a review from Tero on this one, not sure about the pseudo clock naming here. So dropping for now. Regards, Tony