From: Andrew Lunn <andrew@lunn.ch>
To: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
kernel@savoirfairelinux.com,
"David S. Miller" <davem@davemloft.net>
Subject: Re: [PATCH net-next v2 0/6] net: dsa: mv88e6131: HW bridging support for 6185
Date: Fri, 1 Apr 2016 14:45:18 +0200 [thread overview]
Message-ID: <20160401124518.GB32554@lunn.ch> (raw)
In-Reply-To: <1459457626-30082-1-git-send-email-vivien.didelot@savoirfairelinux.com>
On Thu, Mar 31, 2016 at 04:53:40PM -0400, Vivien Didelot wrote:
> All packets passing through a switch of the 6185 family are currently all
> directed to the CPU port. This means that port bridging is software driven.
>
> To enable hardware bridging for this switch family, we need to implement the
> port mapping operations, the FDB operations, and optionally the VLAN operations
> (for 802.1Q and VLAN filtering aware systems).
Hi Vivien
I ran these patches with my tests and got some interesting
results. Not sure if its a feature or a bug.
Hardware looks like
CPU<--->Switch0<--->Switch1<--->Switch2
6352 6352 6185
and the test sets up a bridge spanning the three switches. Packets are
sent between ports on this bridge.
I build three different kernel configurations for these tests:
1) 802.1D
2) 802.1D + 802.1Q
3) 802.1D + 802.1Q + VLAN filtering
With all three configurations, cross chip frames get forwarded and go
out the port they are supposed to. With kernel configuration 1) & 2),
frames from switch2 go via the CPU and are SW bridged back to Switch0
or Switch1.
However, with kernel configuration 3), the CPU never sees the
frames. The bridging is all happening in hardware. Why does this
kernel configuration do something different?
Thanks
Andrew
next prev parent reply other threads:[~2016-04-01 12:45 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-31 20:53 [PATCH net-next v2 0/6] net: dsa: mv88e6131: HW bridging support for 6185 Vivien Didelot
2016-03-31 20:53 ` [PATCH net-next v2 1/6] net: dsa: mv88e6xxx: protect SID register access Vivien Didelot
2016-03-31 20:53 ` [PATCH net-next v2 2/6] net: dsa: mv88e6xxx: protect FID registers access Vivien Didelot
2016-03-31 20:53 ` [PATCH net-next v2 3/6] net: dsa: mv88e6xxx: variable number of databases Vivien Didelot
2016-03-31 20:53 ` [PATCH net-next v2 4/6] net: dsa: mv88e6xxx: support 256 databases Vivien Didelot
2016-03-31 20:53 ` [PATCH net-next v2 5/6] net: dsa: mv88e6xxx: map destination addresses for 6185 Vivien Didelot
2016-03-31 20:53 ` [PATCH net-next v2 6/6] net: dsa: mv88e6131: enable hardware bridging Vivien Didelot
2016-04-01 12:45 ` Andrew Lunn [this message]
2016-04-01 13:38 ` [PATCH net-next v2 0/6] net: dsa: mv88e6131: HW bridging support for 6185 Vivien Didelot
2016-04-04 2:13 ` Andrew Lunn
2016-04-05 1:31 ` David Miller
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