From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756696AbcDNQjh (ORCPT ); Thu, 14 Apr 2016 12:39:37 -0400 Received: from foss.arm.com ([217.140.101.70]:44332 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754865AbcDNQjg (ORCPT ); Thu, 14 Apr 2016 12:39:36 -0400 Date: Thu, 14 Apr 2016 17:39:34 +0100 From: Will Deacon To: Suzuki K Poulose Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, mark.rutland@arm.com, marc.zyngier@arm.com, ynorov@caviumnetworks.com Subject: Re: [PATCH v3 3/7] arm64: Add helpers for detecting AArch32 support at EL0 Message-ID: <20160414163933.GG4584@arm.com> References: <1459445255-15653-1-git-send-email-suzuki.poulose@arm.com> <1459445255-15653-4-git-send-email-suzuki.poulose@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1459445255-15653-4-git-send-email-suzuki.poulose@arm.com> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Mar 31, 2016 at 06:27:31PM +0100, Suzuki K Poulose wrote: > Adds a helper to extract the support for AArch32 at EL0 > > Tested-by: Yury Norov > Signed-off-by: Suzuki K Poulose > --- > arch/arm64/include/asm/cpufeature.h | 7 +++++++ > arch/arm64/include/asm/sysreg.h | 1 + > 2 files changed, 8 insertions(+) > > diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h > index b9b6494..7f64285 100644 > --- a/arch/arm64/include/asm/cpufeature.h > +++ b/arch/arm64/include/asm/cpufeature.h > @@ -170,6 +170,13 @@ static inline bool id_aa64mmfr0_mixed_endian_el0(u64 mmfr0) > cpuid_feature_extract_unsigned_field(mmfr0, ID_AA64MMFR0_BIGENDEL0_SHIFT) == 0x1; > } > > +static inline bool id_aa64pfr0_32bit_el0(u64 pfr0) > +{ > + u32 val = cpuid_feature_extract_unsigned_field(pfr0, ID_AA64PFR0_EL0_SHIFT); > + > + return val == ID_AA64PFR0_EL0_32BIT_64BIT; Should this be >=? What are the rules for this register? Will