From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751535AbcDQQ5z (ORCPT ); Sun, 17 Apr 2016 12:57:55 -0400 Received: from down.free-electrons.com ([37.187.137.238]:58794 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751000AbcDQQ5w convert rfc822-to-8bit (ORCPT ); Sun, 17 Apr 2016 12:57:52 -0400 Date: Sun, 17 Apr 2016 18:57:39 +0200 From: Boris Brezillon To: =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= Cc: "linux-mtd@lists.infradead.org" , Richard Weinberger , David Woodhouse , Brian Norris , open list Subject: Re: [PATCH 10/12] mtd: nand: read ECC algorithm from the new field Message-ID: <20160417185739.4c7411a0@bbrezillon> In-Reply-To: <20160417185005.2c293b36@bbrezillon> References: <1460750052-16285-1-git-send-email-zajec5@gmail.com> <1460750052-16285-11-git-send-email-zajec5@gmail.com> <20160416095807.112d2f59@bbrezillon> <20160417185005.2c293b36@bbrezillon> X-Mailer: Claws Mail 3.12.0 (GTK+ 2.24.28; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, 17 Apr 2016 18:50:05 +0200 Boris Brezillon wrote: > On Sun, 17 Apr 2016 18:27:40 +0200 > Rafał Miłecki wrote: > > > On 16 April 2016 at 09:58, Boris Brezillon > > wrote: > > > On Fri, 15 Apr 2016 21:54:10 +0200 > > > Rafał Miłecki wrote: > > > > > >> Now we have all drivers properly setting this new field we can start > > >> using it and proceed with deprecating NAND_ECC_SOFT_BCH. > > >> > > >> Signed-off-by: Rafał Miłecki > > >> --- > > >> drivers/mtd/nand/nand_base.c | 98 ++++++++++++++++++++++++-------------------- > > >> 1 file changed, 53 insertions(+), 45 deletions(-) > > >> > > >> diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c > > >> index e1f3cf8..ffd1b32 100644 > > >> --- a/drivers/mtd/nand/nand_base.c > > >> +++ b/drivers/mtd/nand/nand_base.c > > >> @@ -4154,7 +4154,7 @@ int nand_scan_tail(struct mtd_info *mtd) > > >> /* > > >> * If no default placement scheme is given, select an appropriate one. > > >> */ > > >> - if (!mtd->ooblayout && (ecc->mode != NAND_ECC_SOFT_BCH)) { > > >> + if (!mtd->ooblayout && ecc->algo != NAND_ECC_BCH) { > > > > > > Should be: > > > > > > if (!mtd->ooblayout && ecc->algo == NAND_ECC_SOFT && > > > ecc->algo != NAND_ECC_BCH) { > > > > > > Otherwise you're also taking the NAND_ECC_HW + NAND_ECC_BCH into > > > account. > > > > Pretty much yes, but without > > [PATCH 11/12] of: mtd: drop support for NAND_ECC_SOFT_BCH as "soft_bch" mapping > > we may be getting NAND_ECC_SOFT as well as NAND_ECC_SOFT_BCH. And > > 11/12 can't be applied before 10/12. We'll need to support both values > > for this very short moment (after 10/12 but before 11/12). > > > Why can't you move patch 11 before patch 10. The DT parsing code has > already been patched to set both ecc->algo to NAND_ECC_BCH and > ecc->mode to NAND_ECC_SOFT, so, to it seems perfectly safe to reorder > those changes to me (and change the test as suggested). > > Am I missing something? > Forget what I just said. How about merging those 2 patches into a single one? BTW, I did not complain so far, but you're trying to split every single change into it's own patch, and I don't think it's required for such simple change as assigning ecc->algo to NAND_ECC_BCH wherever ecc->algo is set to NAND_ECC_SOFT_BCH (even if the patch touches different drivers). And the problem we're facing here is partly caused by this attempt to split every change in its own patch. -- Boris Brezillon, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com