From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751285AbcDQRFv (ORCPT ); Sun, 17 Apr 2016 13:05:51 -0400 Received: from down.free-electrons.com ([37.187.137.238]:58874 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1750921AbcDQRFu convert rfc822-to-8bit (ORCPT ); Sun, 17 Apr 2016 13:05:50 -0400 Date: Sun, 17 Apr 2016 19:05:37 +0200 From: Boris Brezillon To: =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= Cc: linux-mtd@lists.infradead.org, Richard Weinberger , David Woodhouse , Brian Norris , Maxime Ripard , Chen-Yu Tsai , linux-kernel@vger.kernel.org (open list), linux-arm-kernel@lists.infradead.org (moderated list:ARM/Allwinner sunXi SoC support) Subject: Re: [PATCH 12/12] mtd: mtd: drop NAND_ECC_SOFT_BCH enum value Message-ID: <20160417190537.0b484bdd@bbrezillon> In-Reply-To: <1460750052-16285-13-git-send-email-zajec5@gmail.com> References: <1460750052-16285-1-git-send-email-zajec5@gmail.com> <1460750052-16285-13-git-send-email-zajec5@gmail.com> X-Mailer: Claws Mail 3.12.0 (GTK+ 2.24.28; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 15 Apr 2016 21:54:12 +0200 Rafał Miłecki wrote: > This value should not be part of nand_ecc_modes_t as it specifies > algorithm not a mode. We successfully managed to introduce new "algo" > field which is respected now. > > Signed-off-by: Rafał Miłecki > --- > drivers/mtd/nand/fsmc_nand.c | 3 +-- > drivers/mtd/nand/jz4780_nand.c | 1 - > drivers/mtd/nand/nand_base.c | 2 -- > drivers/mtd/nand/nandsim.c | 2 +- > drivers/mtd/nand/sunxi_nand.c | 2 -- > include/linux/mtd/nand.h | 1 - > 6 files changed, 2 insertions(+), 9 deletions(-) > > diff --git a/drivers/mtd/nand/fsmc_nand.c b/drivers/mtd/nand/fsmc_nand.c > index 0f8c63f..d4f454a 100644 > --- a/drivers/mtd/nand/fsmc_nand.c > +++ b/drivers/mtd/nand/fsmc_nand.c > @@ -959,7 +959,6 @@ static int __init fsmc_nand_probe(struct platform_device *pdev) > break; > > case NAND_ECC_SOFT: > - case NAND_ECC_SOFT_BCH: > if (nand->ecc.algo == NAND_ECC_BCH) { > dev_info(&pdev->dev, "Using 4-bit SW BCH ECC scheme\n"); > break; > @@ -974,7 +973,7 @@ static int __init fsmc_nand_probe(struct platform_device *pdev) > * Don't set layout for BCH4 SW ECC. This will be > * generated later in nand_bch_init() later. > */ > - if (nand->ecc.mode != NAND_ECC_SOFT_BCH) { > + if (nand->ecc.mode == NAND_ECC_HW) { This test is wrong, it should be if (nand->ecc.mode != NAND_ECC_SOFT || nand->ecc.algo != NAND_ECC_BCH) or if (!(nand->ecc.mode == NAND_ECC_SOFT && nand->ecc.algo == NAND_ECC_BCH) > switch (mtd->oobsize) { > case 16: > case 64: > diff --git a/drivers/mtd/nand/jz4780_nand.c b/drivers/mtd/nand/jz4780_nand.c > index 10f249a..daf3c42 100644 > --- a/drivers/mtd/nand/jz4780_nand.c > +++ b/drivers/mtd/nand/jz4780_nand.c > @@ -179,7 +179,6 @@ static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *de > chip->ecc.correct = jz4780_nand_ecc_correct; > /* fall through */ > case NAND_ECC_SOFT: > - case NAND_ECC_SOFT_BCH: > dev_info(dev, "using %s (strength %d, size %d, bytes %d)\n", > (nfc->bch) ? "hardware BCH" : "software ECC", > chip->ecc.strength, chip->ecc.size, chip->ecc.bytes); > diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c > index ffd1b32..186d5b5 100644 > --- a/drivers/mtd/nand/nand_base.c > +++ b/drivers/mtd/nand/nand_base.c > @@ -4248,7 +4248,6 @@ int nand_scan_tail(struct mtd_info *mtd) > ecc->algo = NAND_ECC_HAMMING; > > case NAND_ECC_SOFT: > - case NAND_ECC_SOFT_BCH: > switch (ecc->algo) { > case NAND_ECC_HAMMING: > ecc->calculate = nand_calculate_ecc; > @@ -4386,7 +4385,6 @@ int nand_scan_tail(struct mtd_info *mtd) > /* Large page NAND with SOFT_ECC should support subpage reads */ > switch (ecc->mode) { > case NAND_ECC_SOFT: > - case NAND_ECC_SOFT_BCH: > if (chip->page_shift > 9) > chip->options |= NAND_SUBPAGE_READ; > break; > diff --git a/drivers/mtd/nand/nandsim.c b/drivers/mtd/nand/nandsim.c > index 6ff1d8d..b0074c2 100644 > --- a/drivers/mtd/nand/nandsim.c > +++ b/drivers/mtd/nand/nandsim.c > @@ -2339,7 +2339,7 @@ static int __init ns_init_module(void) > retval = -EINVAL; > goto error; > } > - chip->ecc.mode = NAND_ECC_SOFT_BCH; > + chip->ecc.mode = NAND_ECC_SOFT; > chip->ecc.algo = NAND_ECC_BCH; > chip->ecc.size = 512; > chip->ecc.strength = bch; > diff --git a/drivers/mtd/nand/sunxi_nand.c b/drivers/mtd/nand/sunxi_nand.c > index 1baf8983..a83a690 100644 > --- a/drivers/mtd/nand/sunxi_nand.c > +++ b/drivers/mtd/nand/sunxi_nand.c > @@ -1612,8 +1612,6 @@ static int sunxi_nand_ecc_init(struct mtd_info *mtd, struct nand_ecc_ctrl *ecc, > return -EINVAL; > > switch (ecc->mode) { > - case NAND_ECC_SOFT_BCH: > - break; > case NAND_ECC_HW: > ret = sunxi_nand_hw_ecc_ctrl_init(mtd, ecc, np); > if (ret) > diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h > index e851839..fbe8e16 100644 > --- a/include/linux/mtd/nand.h > +++ b/include/linux/mtd/nand.h > @@ -116,7 +116,6 @@ typedef enum { > NAND_ECC_HW, > NAND_ECC_HW_SYNDROME, > NAND_ECC_HW_OOB_FIRST, > - NAND_ECC_SOFT_BCH, > } nand_ecc_modes_t; > > enum nand_ecc_algo { -- Boris Brezillon, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com