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Date: Mon, 18 Apr 2016 09:45:09 +0100
From: Mark Rutland <mark.rutland@arm.com>
To: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: arm@kernel.org, devicetree@vger.kernel.org,
        Kumar Gala <galak@codeaurora.org>, linux-kernel@vger.kernel.org,
        Ian Campbell <ijc+devicetree@hellion.org.uk>,
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        Will Deacon <will.deacon@arm.com>,
        Catalin Marinas <catalin.marinas@arm.com>,
        linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] arm64: dts: uniphier: add /memreserve/ for spin-table
 release address
Message-ID: <20160418084508.GA21438@leverpostej>
References: <1460743138-17768-1-git-send-email-yamada.masahiro@socionext.com>
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On Sat, Apr 16, 2016 at 02:58:58AM +0900, Masahiro Yamada wrote:
> As Documentation/arm64/booting.txt says, the cpu-release-addr
> location should be reserved.
> 
> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
> ---
> 
>  arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi
> index 651c9d9..90909d2 100644
> --- a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi
> +++ b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi
> @@ -42,6 +42,8 @@
>   *     OTHER DEALINGS IN THE SOFTWARE.
>   */
>  
> +/memreserve/ 0x80000100 0x00000008;
> +

Please add a comment above the memreserve to mention what it is
protecting. That helps to avoid having this cargo-culted to cases where
it is not needed.

I take it that the code for the spin-table is not in RAM, and does not
need to be protected similarly?

Assuming so:

Acked-by: Mark Rutland <mark.rutland@arm.com>

Thanks,
Mark.

>  / {
>  	compatible = "socionext,ph1-ld20";
>  	#address-cells = <2>;
> -- 
> 1.9.1
> 
> --
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