From: Richard Cochran <richardcochran@gmail.com>
To: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Jeff Kirsher <jeffrey.t.kirsher@intel.com>,
Jesse Brandeburg <jesse.brandeburg@intel.com>,
Shannon Nelson <shannon.nelson@intel.com>,
Carolyn Wyborny <carolyn.wyborny@intel.com>,
Don Skidmore <donald.c.skidmore@intel.com>,
Bruce Allan <bruce.w.allan@intel.com>,
John Ronciak <john.ronciak@intel.com>,
Mitch Williams <mitch.a.williams@intel.com>,
LKML <linux-kernel@vger.kernel.org>
Subject: Re: e1000e: can TIMINCA register be zero?
Date: Tue, 19 Apr 2016 15:07:08 +0200 [thread overview]
Message-ID: <20160419130708.GA7514@localhost.localdomain> (raw)
In-Reply-To: <57160BF8.6020001@redhat.com>
On Tue, Apr 19, 2016 at 12:44:08PM +0200, Denys Vlasenko wrote:
> User says it happens on hotplug.
This sounds familiar.
http://lists.openwall.net/netdev/2016/02/07/90
It also only ever happends in a VM, right?
> In 1000e_config_hwtstamp(), it is initialized before timecounter_init():
...
> By code inspection, e1000e_get_base_timinca() either returns -EINVAL
> and we don't do timecounter_init() and the division/0 location
> is not reached, or e1000e_get_base_timinca(®val) sets
> nonzero regval. Then we set TIMINCA to this nonzero value.
Right, the register is always set to a non-zero value.
> Isn't it fishy that then timecounter_init() -> e1000e_cyclecounter_read()
> -> er32(TIMINCA) sees zero there?
Sure is.
Thanks,
Richard
next prev parent reply other threads:[~2016-04-19 13:07 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-19 10:44 e1000e: can TIMINCA register be zero? Denys Vlasenko
2016-04-19 13:07 ` Richard Cochran [this message]
2016-04-19 13:26 ` Denys Vlasenko
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