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Date: Sat, 23 Apr 2016 04:31:13 +0200
From: Peter Zijlstra <peterz@infradead.org>
To: Boqun Feng <boqun.feng@gmail.com>
Cc: torvalds@linux-foundation.org, mingo@kernel.org, tglx@linutronix.de,
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Subject: Re: [RFC][PATCH 18/31] locking,powerpc: Implement
 atomic{,64}_fetch_{add,sub,and,or,xor}{,_relaxed,_acquire,_release}()
Message-ID: <20160423023113.GY3430@twins.programming.kicks-ass.net>
References: <20160422090413.393652501@infradead.org>
 <20160422093924.212277819@infradead.org>
 <20160422164157.GB3369@insomnia>
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On Sat, Apr 23, 2016 at 12:41:57AM +0800, Boqun Feng wrote:
> > +#define ATOMIC_FETCH_OP_RELAXED(op, asm_op)				\
> > +static inline int atomic_fetch_##op##_relaxed(int a, atomic_t *v)	\
> > +{									\
> > +	int res, t;							\
> > +									\
> > +	__asm__ __volatile__(						\
> > +"1:	lwarx	%0,0,%4		# atomic_fetch_" #op "_relaxed\n"	\
> > +	#asm_op " %1,%2,%0\n"						\
> 
> Should be
> 
> 	#asm_op " %1,%3,%0\n"
> 
> right? Because %2 is v->counter and %3 is @a.

Indeed, thanks!