Re: [PATCH 3/3] mtd: brcmnand: respect ECC algorithm set by NAND subsystem

Rafał Miłecki
2016-04-26T18:38:12Z

On 26 April 2016 at 07:53, Brian Norris <computersforpeace@gmail.com> wrote:
> From: Brian Norris <computersforpeace@gmail.com>
> Date: Mon, 25 Apr 2016 20:48:02 -0700
> Subject: [PATCH] mtd: brcmnand: respect ECC algorithm set by the NAND
> subsystem
>
> This is more obvious than guessing based on ECC strength. It allows
> using NAND on devices with BCH-1 (e.g. D-Link DIR-885L).
>
> This maintains DT backward compatibility by defaulting to Hamming if a
> 1-bit ECC algorithm is specified without a corresponding algorithm
> selection. i.e., to use BCH-1, you must specify:
>
> nand-ecc-strength = <1>;
> nand-ecc-step-size = <512>;
> nand-ecc-algo = "bch";
>
> Also adds a check to ensure we haven't allowed someone to get by with SW
> ECC. If we want to support SW ECC, we need to refactor some other pieces
> of this driver.
>
> Signed-off-by: Brian Norris <computersforpeace@gmail.com>

Tested-by: Rafał Miłecki <zajec5@gmail.com>

I just needed to apply following patch first:
[PATCH] mtd: nand: fix NULL pointer dereference in of_get_nand_ecc_algo