From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752331AbcDZRDH (ORCPT ); Tue, 26 Apr 2016 13:03:07 -0400 Received: from muru.com ([72.249.23.125]:52104 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751363AbcDZRDF (ORCPT ); Tue, 26 Apr 2016 13:03:05 -0400 Date: Tue, 26 Apr 2016 10:03:01 -0700 From: Tony Lindgren To: Nishanth Menon Cc: =?utf-8?Q?Beno=C3=AEt?= Cousson , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-omap@vger.kernel.org Subject: Re: [PATCH] ARM: dts: AM57xx/DRA7: Update SoC voltage rail limits to match data sheet Message-ID: <20160426170300.GC5995@atomide.com> References: <1461140319-32026-1-git-send-email-nm@ti.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1461140319-32026-1-git-send-email-nm@ti.com> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org * Nishanth Menon [160420 01:20]: > As per the data sheet starting from SPRUHQ0H (Nov 2015 - Latest[1]), > VDD_CORE can vary from 0.85v to 1.15v for AVS class0. VDD GPU/DSP > et.al. can range from 0.85v to 1.25V with AVS class0 > > Since dynamic voltage scaling is disabled for DRA7/AM57xx SoCs for > all SoC rails other than MPU, the bootloader is responsible for > setting up the AVS class0 voltage, however, with wrong voltage machine > constraints in dtb, regulator framework will lower the voltage below > the required voltage levels for certain samples in production flow. > This can cause catastrophic failures which can be pretty hard to > identify. > > Update board files which don't match required specification. > > [1] http://www.ti.com/product/AM5728/datasheet/specifications#SPRT637-7340 Applying into omap-for-v4.7/dt thanks. This does not apply to v4.6-rc, so assuming this is not an urgent fix. Regards, Tony