Re: [PATCH v7 08/15] i2c: octeon: Improve performance if interrupt is early

Wolfram Sang
2016-04-26T21:10:45Z

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On Mon, Apr 25, 2016 at 04:33:37PM +0200, Jan Glauber wrote:
> From: Peter Swain <pswain@cavium.com>
>
> There is a race between the TWSI interrupt and the condition
> that is required before proceeding:
>
> Low-level: interrupt flag bit must be set
> High-level controller: valid bit must be clear
>
> If the interrupt comes too early and the condition is not met
> the wait will time out, and the transfer is aborted leading
> to very poor performance.
>
> To avoid this race retry for the condition ~80 µs later.
> The retry is avoided on the very first invocation of
> wait_event_timeout() (which tests the condition before entering
> the wait and is therefore always wrong in this case).
>
> EEPROM reads on 100kHz i2c now measure ~5.2kB/s, about 1/2 what's
> achievable, and much better than the worst-case 100 bytes/sec before.
>
> While at it remove the debug print from the low-level wait function.
>
> Signed-off-by: Peter Swain <pswain@cavium.com>
> Signed-off-by: Jan Glauber <jglauber@cavium.com>

Applied to for-next, thanks!

Assigned 'true' instead of '1' to bool...

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