From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755019AbcEDScU (ORCPT ); Wed, 4 May 2016 14:32:20 -0400 Received: from down.free-electrons.com ([37.187.137.238]:36819 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751088AbcEDScT (ORCPT ); Wed, 4 May 2016 14:32:19 -0400 Date: Wed, 4 May 2016 20:32:06 +0200 From: Maxime Ripard To: Priit Laes Cc: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , Chen-Yu Tsai , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com Subject: Re: [PATCH 1/2] ARM: sun4i: dt: Add pll3 and pll7 clocks Message-ID: <20160504183206.GC17159@lukather> References: <1462295659-6945-1-git-send-email-plaes@plaes.org> <1462295659-6945-2-git-send-email-plaes@plaes.org> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="ZDIREgaZHBBvWU9r" Content-Disposition: inline In-Reply-To: <1462295659-6945-2-git-send-email-plaes@plaes.org> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --ZDIREgaZHBBvWU9r Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hi, On Tue, May 03, 2016 at 08:14:18PM +0300, Priit Laes wrote: > Enable pll3 and pll7 clocks that are needed to drive display clocks. >=20 > Signed-off-by: Priit Laes > --- > arch/arm/boot/dts/sun4i-a10.dtsi | 44 ++++++++++++++++++++++++++++++++++= ++++++ > 1 file changed, 44 insertions(+) >=20 > diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a= 10.dtsi > index 268a150..c893744 100644 > --- a/arch/arm/boot/dts/sun4i-a10.dtsi > +++ b/arch/arm/boot/dts/sun4i-a10.dtsi > @@ -184,6 +184,15 @@ > clock-output-names =3D "osc24M"; > }; > =20 > + osc3M: osc3M_clk { > + compatible =3D "fixed-factor-clock"; > + #clock-cells =3D <0>; > + clock-div =3D <8>; > + clock-mult =3D <1>; > + clocks =3D <&osc24M>; > + clock-output-names =3D "osc3M"; > + }; > + > osc32k: clk@0 { > #clock-cells =3D <0>; > compatible =3D "fixed-clock"; > @@ -208,6 +217,24 @@ > "pll2-4x", "pll2-8x"; > }; > =20 > + pll3: clk@01c20010 { > + #clock-cells =3D <0>; > + compatible =3D "allwinner,sun4i-a10-pll3-clk"; > + reg =3D <0x01c20010 0x4>; > + clocks =3D <&osc3M>; > + clock-output-names =3D "pll3"; > + }; > + > + pll3x2: pll3x2_clk { > + compatible =3D "fixed-factor-clock"; > + #clock-cells =3D <0>; > + clock-div =3D <1>; > + clock-mult =3D <2>; > + clocks =3D <&pll3>; > + clock-output-names =3D "pll3-x2"; We usually call them -2x > + }; > + > + One newline too many. Fixed it and applied the patch. Thanks! Maxime --=20 Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com --ZDIREgaZHBBvWU9r Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAEBAgAGBQJXKkAmAAoJEBx+YmzsjxAguJUP/1cqSVLNUy+5FhCyEMRbmpMU R8z54Q+EjSkuN6+86CTb4uyb6+uypEZEukFyeIsyLnkmUjIg/2SNmpVDRHjVxZbG f7dc2b/xi2zyCOhomMav9pU/mp96lBH76fdaBouMXExQ8AbHdaBZru9Eb3cKm5Xf uJymfXQZBIzPGpX/ZQ0HwPzV3w/dCm0zV/KfbElWFaYk2nSUqbDyx6w+tn3jmRv2 mAQ52RL8ypfWd5vS76BQs3PGoW+Dx08P3L3lDgdrvDXkC6xtDmXCZS4coe5lMvLr HQMNBfpVIE8iGQk4Ab/x3+JcXShGh6APDxZyecw7LvRVcB3yjumSwbIoohDH49dN Ovoqt5HRa2MaSWeCkNKyC6WqHxVaG32N4udSL+p3EMxn8rVg5Ne3jEIwCt6l+pQp HygKP67yFjTLNjTRZsJ+CLRtnpDBJy6Cx4aRUy1EbjgX+fXswfwEyAzlDAfw2mIK kYBjEHoqOS+TGrZnGyUjsQZJcTCC5h8eK+LXrKmFXYIC2IUv5tPpvzPCph/VuyoH mAG+zzbvQ52Y6LfoEaQ6mJTN3xGzUQ0E1pK/fe99W23XB2l2/ufaoOG9bJ9Wmh2H NZN+drocNDCOzW8vU7/NDrsOMQD1bOkXqZxA67ew6/v/GmGqLXq/KR7QsFmE/sFU SpAmLD6mvysICZNQVMve =4Szu -----END PGP SIGNATURE----- --ZDIREgaZHBBvWU9r--