From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758350AbcEFO1i (ORCPT ); Fri, 6 May 2016 10:27:38 -0400 Received: from foss.arm.com ([217.140.101.70]:56375 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757430AbcEFO1f (ORCPT ); Fri, 6 May 2016 10:27:35 -0400 Date: Fri, 6 May 2016 15:27:24 +0100 From: Marc Zyngier To: Jon Hunter Cc: Thomas Gleixner , Jason Cooper , Rob Herring , "Pawel Moll" , Mark Rutland , Ian Campbell , Kumar Gala , "Stephen Warren" , Thierry Reding , Kevin Hilman , Geert Uytterhoeven , Grygorii Strashko , Lars-Peter Clausen , Linus Walleij , , , , Subject: Re: [PATCH V3 16/17] irqchip/gic: Prepare for adding platform driver Message-ID: <20160506152724.32c9000b@arm.com> In-Reply-To: <572CA5AF.7080504@nvidia.com> References: <1462379130-11742-1-git-send-email-jonathanh@nvidia.com> <1462379130-11742-17-git-send-email-jonathanh@nvidia.com> <572B54F4.2080103@arm.com> <572CA5AF.7080504@nvidia.com> Organization: ARM Ltd X-Mailer: Claws Mail 3.11.1 (GTK+ 2.24.25; arm-unknown-linux-gnueabihf) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 6 May 2016 15:09:51 +0100 Jon Hunter wrote: Hi Jon, [...] > > +int gic_of_setup(struct device_node *node, struct device *dev, > > + struct gic_chip_data **gicp) > > +{ > > + struct gic_chip_data *gic; > > > > - *cpu_base = of_iomap(node, 1); > > - if (WARN(!*cpu_base, "unable to map gic cpu registers\n")) { > > - iounmap(*dist_base); > > - return -ENOMEM; > > + if (!node || !gicp) > > + return -EINVAL; > > + > > + if (dev) { > > + *gicp = devm_kzalloc(dev, sizeof(*gic), GFP_KERNEL); > > + if (!*gicp) > > + return -ENOMEM; > > } > > > > - if (of_property_read_u32(node, "cpu-offset", percpu_offset)) > > - *percpu_offset = 0; > > + gic = *gicp; > > + > > + gic->raw_dist_base = of_iomap(node, 0); > > + if (WARN(!gic->raw_dist_base, "unable to map gic dist registers\n")) > > + goto err; > > + > > + gic->raw_cpu_base = of_iomap(node, 1); > > + if (WARN(!gic->raw_cpu_base, "unable to map gic cpu registers\n")) > > + goto err; > > + > > + if (of_property_read_u32(node, "cpu-offset", &gic->percpu_offset)) > > + gic->percpu_offset = 0; > > > > + gic->chip.parent_device = dev; > > We can't initialise the device here as it gets overwritten in the > gic_init_bases. So I have had to re-organise things a bit. Good news is > that I have eliminated the call from the platform driver to > gic_init_bases so we only have a single call to initialise the GIC. Ah, good. That sounds a lot better. Looking forward to v4. Thanks, M. -- Jazz is not dead. It just smells funny.