From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751640AbcEGFrx (ORCPT ); Sat, 7 May 2016 01:47:53 -0400 Received: from mail-wm0-f54.google.com ([74.125.82.54]:37109 "EHLO mail-wm0-f54.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750738AbcEGFrw (ORCPT ); Sat, 7 May 2016 01:47:52 -0400 Date: Sat, 7 May 2016 07:47:48 +0200 From: Ingo Molnar To: hchrzani Cc: lukasz.anaczkowski@intel.com, tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, x86@kernel.org, peterz@infradead.org, kan.liang@intel.com, vthakkar1994@gmail.com, bp@suse.de, harish.chegondi@intel.com, izumi.taku@jp.fujitsu.com, linux-kernel@vger.kernel.org, Lawrence F Meadows Subject: Re: [PATCH] perf/x86/intel/uncore: Fix CHA registers configuration procedure for Knights Landing platform Message-ID: <20160507054748.GA21394@gmail.com> References: <1462540856-32090-1-git-send-email-hubert.chrzaniuk@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1462540856-32090-1-git-send-email-hubert.chrzaniuk@intel.com> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org * hchrzani wrote: > CHA events in Knights Landing platform require programming filter registers properly. > Remote node, local node and NonNearMemCachable bits should be set to 1 at all times. > > Fixes: 77af003 ('perf/x86/intel/uncore: Add Knights Landing uncore PMU support') > Signed-off-by: Hubert Chrzaniuk > Signed-off-by: Lawrence F Meadows > --- > arch/x86/events/intel/uncore_snbep.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c > index ab2bcaa..4b9e294 100644 > --- a/arch/x86/events/intel/uncore_snbep.c > +++ b/arch/x86/events/intel/uncore_snbep.c > @@ -219,6 +219,9 @@ > #define KNL_CHA_MSR_PMON_BOX_FILTER_TID 0x1ff > #define KNL_CHA_MSR_PMON_BOX_FILTER_STATE (7 << 18) > #define KNL_CHA_MSR_PMON_BOX_FILTER_OP (0xfffffe2aULL << 32) > +#define KNL_CHA_MSR_PMON_BOX_FILER_REMOTE_NODE (0x1ULL << 32) > +#define KNL_CHA_MSR_PMON_BOX_FILTER_LOCAL_NODE (0x1ULL << 33) > +#define KNL_CHA_MSR_PMON_BOX_FILTER_NNC (0x1ULL << 37) > > /* KNL EDC/MC UCLK */ > #define KNL_UCLK_MSR_PMON_CTR0_LOW 0x400 > @@ -1902,6 +1905,10 @@ static int knl_cha_hw_config(struct intel_uncore_box *box, > reg1->reg = HSWEP_C0_MSR_PMON_BOX_FILTER0 + > KNL_CHA_MSR_OFFSET * box->pmu->pmu_idx; > reg1->config = event->attr.config1 & knl_cha_filter_mask(idx); > + > + reg1->config |= KNL_CHA_MSR_PMON_BOX_FILER_REMOTE_NODE; > + reg1->config |= KNL_CHA_MSR_PMON_BOX_FILTER_LOCAL_NODE; > + reg1->config |= KNL_CHA_MSR_PMON_BOX_FILTER_NNC; s/FILER/FILTER? Thanks, Ingo