From: Joerg Roedel <joro@8bytes.org>
To: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
Cc: pbonzini@redhat.com, rkrcmar@redhat.com, bp@alien8.de,
gleb@kernel.org, alex.williamson@redhat.com, kvm@vger.kernel.org,
linux-kernel@vger.kernel.org, wei@redhat.com,
sherry.hurwitz@amd.com
Subject: Re: [PART2 RFC v1 1/9] iommu/amd: Detect and enable guest vAPIC support
Date: Mon, 9 May 2016 13:49:27 +0200 [thread overview]
Message-ID: <20160509114927.GC13971@8bytes.org> (raw)
In-Reply-To: <1460119770-2896-2-git-send-email-Suravee.Suthikulpanit@amd.com>
On Fri, Apr 08, 2016 at 07:49:22AM -0500, Suthikulpanit, Suravee wrote:
> From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
>
> This patch introduces a new IOMMU driver parameter, amd_iommu_guest_ir,
> which can be used to specify different interrupt remapping mode for
> passthrough devices to VM guest:
> * legacy: Legacy interrupt remapping mode (w/ 32-bit IRTE)
> * ga : Guest vAPIC interrupt remapping mode (w/ 128-bit IRTE)
>
> Note that the GA mode also supports legacy interrupt remapping
> for non-passthrough devices with the 128-bit IRTE.
Does this need to be under user control? The code can just check what
the hardware supports and use the 128bit IRTEs if supported, no?
Joerg
next prev parent reply other threads:[~2016-05-09 11:49 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-08 12:49 [PART2 RFC v1 0/9] iommu/AMD: Introduce IOMMU AVIC support Suravee Suthikulpanit
2016-04-08 12:49 ` [PART2 RFC v1 1/9] iommu/amd: Detect and enable guest vAPIC support Suravee Suthikulpanit
2016-05-09 11:49 ` Joerg Roedel [this message]
2016-06-02 20:38 ` Suravee Suthikulanit
2016-04-08 12:49 ` [PART2 RFC v1 2/9] iommu/amd: Add data structure for " Suravee Suthikulpanit
2016-04-08 12:49 ` [PART2 RFC v1 3/9] iommu/amd: Detect and initialize guest vAPIC log Suravee Suthikulpanit
2016-04-08 12:49 ` [PART2 RFC v1 4/9] iommu/amd: Adding GALOG interrupt handler Suravee Suthikulpanit
2016-04-08 12:49 ` [PART2 RFC v1 5/9] iommu/amd: Introduce amd_iommu_update_ga() Suravee Suthikulpanit
2016-04-13 17:06 ` Radim Krčmář
2016-06-09 23:59 ` Suravee Suthikulpanit
2016-04-08 12:49 ` [PART2 RFC v1 6/9] iommu/amd: Implements irq_set_vcpu_affinity hook to setup GA mode for pass-through devices Suravee Suthikulpanit
2016-04-08 12:49 ` [PART2 RFC v1 7/9] svm: Introduce AMD IOMMU avic_ga_log_notifier Suravee Suthikulpanit
2016-04-08 12:49 ` [PART2 RFC v1 8/9] svm: Implements update_pi_irte hook to setup posted interrupt Suravee Suthikulpanit
2016-04-08 12:49 ` [PART2 RFC v1 9/9] svm: Update AMD IOMMU IRTE with vcpu scheduling information when enable AVIC Suravee Suthikulpanit
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20160509114927.GC13971@8bytes.org \
--to=joro@8bytes.org \
--cc=Suravee.Suthikulpanit@amd.com \
--cc=alex.williamson@redhat.com \
--cc=bp@alien8.de \
--cc=gleb@kernel.org \
--cc=kvm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=pbonzini@redhat.com \
--cc=rkrcmar@redhat.com \
--cc=sherry.hurwitz@amd.com \
--cc=wei@redhat.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox