From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752048AbcELWW3 (ORCPT ); Thu, 12 May 2016 18:22:29 -0400 Received: from mail-pa0-f54.google.com ([209.85.220.54]:35064 "EHLO mail-pa0-f54.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751141AbcELWW1 (ORCPT ); Thu, 12 May 2016 18:22:27 -0400 Date: Thu, 12 May 2016 15:22:23 -0700 From: Brian Norris To: Shawn Lin Cc: Heiko Stuebner , linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, dianders@chromium.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, h Subject: Re: [PATCH 1/2] ARM64: dts: rockchip: add sdhci/emmc for rk3399 Message-ID: <20160512222223.GA57835@google.com> References: <1462924975-69072-1-git-send-email-briannorris@chromium.org> <3e257ce2-056a-592a-9481-970da1fe0627@rock-chips.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <3e257ce2-056a-592a-9481-970da1fe0627@rock-chips.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, May 11, 2016 at 09:17:38AM +0800, Shawn Lin wrote: > How about adding these? > > assigned-clocks = <&cru SCLK_EMMC>; > assigned-clock-parents = <&cru PLL_CPLL>; //may not need BTW, even if I assign the parent here, it's not actually taking effect on my system. Presumably the common clock framework is finding a "better" way to satisfy 200 MHz through GPLL instead. So I'm dropping the assigned-clock-parents for v2. > assigned-clock-rates = <200000000>; Brian