From: Borislav Petkov <bp@alien8.de>
To: "Luck, Tony" <tony.luck@intel.com>
Cc: "linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Aristeu Rozanski <arozansk@redhat.com>
Subject: Re: [PATCH] x86/mce: Do not use bank 1 for APEI generated error logs.
Date: Fri, 3 Jun 2016 10:20:25 +0200 [thread overview]
Message-ID: <20160603082025.GC4129@pd.tnic> (raw)
In-Reply-To: <3908561D78D1C84285E8C5FCA982C28F3A0F7606@ORSMSX114.amr.corp.intel.com>
On Tue, May 31, 2016 at 06:18:42PM +0000, Luck, Tony wrote:
> Intel is stuck at 32 unless we come up with a new mechanism and change
> all the code that generates MSR numbers with "base + 4*i". There are
> some virtualization MSRs allocated at what would be bank32.
Just when I was hoping that 32 banks should be more than enough and hw
people would restrain themselves. Looks like a "natural" restraint has
presented itself ... :-))
Anyway, v2 applied, thanks.
--
Regards/Gruss,
Boris.
ECO tip #101: Trim your mails when you reply.
prev parent reply other threads:[~2016-06-03 8:21 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-27 21:11 [PATCH] x86/mce: Do not use bank 1 for APEI generated error logs Tony Luck
2016-05-28 7:34 ` Borislav Petkov
2016-05-31 17:11 ` Luck, Tony
2016-05-31 18:09 ` Borislav Petkov
2016-05-31 18:18 ` Luck, Tony
2016-06-03 8:20 ` Borislav Petkov [this message]
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