From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932913AbcFCNdx (ORCPT ); Fri, 3 Jun 2016 09:33:53 -0400 Received: from e18.ny.us.ibm.com ([129.33.205.208]:59097 "EHLO e18.ny.us.ibm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752724AbcFCNdv (ORCPT ); Fri, 3 Jun 2016 09:33:51 -0400 X-IBM-Helo: d01dlp02.pok.ibm.com X-IBM-MailFrom: paulmck@linux.vnet.ibm.com X-IBM-RcptTo: linux-kernel@vger.kernel.org;netfilter-devel@vger.kernel.org Date: Fri, 3 Jun 2016 06:33:50 -0700 From: "Paul E. McKenney" To: Peter Zijlstra Cc: Vineet Gupta , Waiman Long , linux-kernel@vger.kernel.org, torvalds@linux-foundation.org, manfred@colorfullife.com, dave@stgolabs.net, will.deacon@arm.com, boqun.feng@gmail.com, tj@kernel.org, pablo@netfilter.org, kaber@trash.net, davem@davemloft.net, oleg@redhat.com, netfilter-devel@vger.kernel.org, sasha.levin@oracle.com, hofrat@osadl.org Subject: Re: [RFC][PATCH 1/3] locking: Introduce smp_acquire__after_ctrl_dep Message-ID: <20160603133350.GW5231@linux.vnet.ibm.com> Reply-To: paulmck@linux.vnet.ibm.com References: <20160524143649.523586684@infradead.org> <57451581.6000700@hpe.com> <20160525045329.GQ4148@linux.vnet.ibm.com> <5745C2CA.4040003@hpe.com> <20160525155747.GE3789@linux.vnet.ibm.com> <57514B6E.6010001@synopsys.com> <20160603093834.GI3190@twins.programming.kicks-ass.net> <20160603120827.GT5231@linux.vnet.ibm.com> <20160603122310.GM3190@twins.programming.kicks-ass.net> <20160603122752.GX3205@twins.programming.kicks-ass.net> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20160603122752.GX3205@twins.programming.kicks-ass.net> User-Agent: Mutt/1.5.21 (2010-09-15) X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 16060313-0045-0000-0000-0000045D53A3 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Jun 03, 2016 at 02:27:52PM +0200, Peter Zijlstra wrote: > On Fri, Jun 03, 2016 at 02:23:10PM +0200, Peter Zijlstra wrote: > > On Fri, Jun 03, 2016 at 05:08:27AM -0700, Paul E. McKenney wrote: > > > On Fri, Jun 03, 2016 at 11:38:34AM +0200, Peter Zijlstra wrote: > > > > On Fri, Jun 03, 2016 at 02:48:38PM +0530, Vineet Gupta wrote: > > > > > On Wednesday 25 May 2016 09:27 PM, Paul E. McKenney wrote: > > > > > > For your example, but keeping the compiler in check: > > > > > > > > > > > > if (READ_ONCE(a)) > > > > > > WRITE_ONCE(b, 1); > > > > > > smp_rmb(); > > > > > > WRITE_ONCE(c, 2); > > > > > > > > So I think it example is broken. The store to @c is not in fact > > > > dependent on the condition of @a. > > > > > > At first glance, the compiler could pull the write to "c" above the > > > conditional, but the "memory" constraint in smp_rmb() prevents this. > > > From a hardware viewpoint, the write to "c" does depend on the "if", > > > as the conditional branch does precede that write in execution order. > > > > > > But yes, this is using smp_rmb() in a very strange way, if that is > > > what you are getting at. > > > > Well, the CPU could decide that the store to C happens either way around > > the branch. I'm not sure I'd rely on CPUs not being _that_ clever. > > > > test %a, $0 > > jnz 1f > > mov $1, %b > > 1: mov $2, %c > > > > Its not too much to ask the CPU to look ahead 2 instructions to figure > > out the store into c is going to happen unconditionally. > > > > I would really only rely on stores immediately dependent on the > > conditional. > > Ah, interrupts could observe the difference, which is your execution > order constraint. So yes, maybe. > > I'm still rather hesitant on this. Any info on Itanium? Again, I am reasonably sure that Power and ARM architectures guarantee to avoid excess cleverness on the part of the CPU in this case. Thanx, Paul