Re: [PATCH 3/4] mfd: hi655x-pmic: Rename some interrupt macro names

[Lee Jones <lee.jones@linaro.org>]

On Tue, 14 Jun 2016, John Stultz wrote:

> Currently the hi655x-pmic driver has names for interrupt mask
> values, but not for the interrupt numbers themselves.
> 
> So to allow for interrupt numbers to have sane names, rename
> the mask values with the _MASK postfix and use the existing
> names as the interrupt name
> 
> Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Lee Jones <lee.jones@linaro.org>
> Cc: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
> Cc: Feng Chen <puck.chen@hisilicon.com>
> Cc: Wei Xu <xuwei5@hisilicon.com>
> Cc: Guodong Xu <guodong.xu@linaro.org>
> Signed-off-by: John Stultz <john.stultz@linaro.org>
> ---
>  drivers/mfd/hi655x-pmic.c       | 16 ++++++++--------
>  include/linux/mfd/hi655x-pmic.h | 25 +++++++++++++++++--------
>  2 files changed, 25 insertions(+), 16 deletions(-)

Applied, thanks.

> diff --git a/drivers/mfd/hi655x-pmic.c b/drivers/mfd/hi655x-pmic.c
> index 68ab370..072e6fe 100644
> --- a/drivers/mfd/hi655x-pmic.c
> +++ b/drivers/mfd/hi655x-pmic.c
> @@ -29,14 +29,14 @@ static const struct mfd_cell hi655x_pmic_devs[] = {
>  };
>  
>  static const struct regmap_irq hi655x_irqs[] = {
> -	{ .reg_offset = 0, .mask = OTMP_D1R_INT },
> -	{ .reg_offset = 0, .mask = VSYS_2P5_R_INT },
> -	{ .reg_offset = 0, .mask = VSYS_UV_D3R_INT },
> -	{ .reg_offset = 0, .mask = VSYS_6P0_D200UR_INT },
> -	{ .reg_offset = 0, .mask = PWRON_D4SR_INT },
> -	{ .reg_offset = 0, .mask = PWRON_D20F_INT },
> -	{ .reg_offset = 0, .mask = PWRON_D20R_INT },
> -	{ .reg_offset = 0, .mask = RESERVE_INT },
> +	{ .reg_offset = 0, .mask = OTMP_D1R_INT_MASK },
> +	{ .reg_offset = 0, .mask = VSYS_2P5_R_INT_MASK },
> +	{ .reg_offset = 0, .mask = VSYS_UV_D3R_INT_MASK },
> +	{ .reg_offset = 0, .mask = VSYS_6P0_D200UR_INT_MASK },
> +	{ .reg_offset = 0, .mask = PWRON_D4SR_INT_MASK },
> +	{ .reg_offset = 0, .mask = PWRON_D20F_INT_MASK },
> +	{ .reg_offset = 0, .mask = PWRON_D20R_INT_MASK },
> +	{ .reg_offset = 0, .mask = RESERVE_INT_MASK },
>  };
>  
>  static const struct regmap_irq_chip hi655x_irq_chip = {
> diff --git a/include/linux/mfd/hi655x-pmic.h b/include/linux/mfd/hi655x-pmic.h
> index dbbe9a6..62f03c2 100644
> --- a/include/linux/mfd/hi655x-pmic.h
> +++ b/include/linux/mfd/hi655x-pmic.h
> @@ -34,14 +34,23 @@
>  #define PMU_VER_START                   0x10
>  #define PMU_VER_END                     0x38
>  
> -#define RESERVE_INT                     BIT(7)
> -#define PWRON_D20R_INT                  BIT(6)
> -#define PWRON_D20F_INT                  BIT(5)
> -#define PWRON_D4SR_INT                  BIT(4)
> -#define VSYS_6P0_D200UR_INT             BIT(3)
> -#define VSYS_UV_D3R_INT                 BIT(2)
> -#define VSYS_2P5_R_INT                  BIT(1)
> -#define OTMP_D1R_INT                    BIT(0)
> +#define RESERVE_INT                     7
> +#define PWRON_D20R_INT                  6
> +#define PWRON_D20F_INT                  5
> +#define PWRON_D4SR_INT                  4
> +#define VSYS_6P0_D200UR_INT             3
> +#define VSYS_UV_D3R_INT                 2
> +#define VSYS_2P5_R_INT                  1
> +#define OTMP_D1R_INT                    0
> +
> +#define RESERVE_INT_MASK                BIT(RESERVE_INT)
> +#define PWRON_D20R_INT_MASK             BIT(PWRON_D20R_INT)
> +#define PWRON_D20F_INT_MASK             BIT(PWRON_D20F_INT)
> +#define PWRON_D4SR_INT_MASK             BIT(PWRON_D4SR_INT)
> +#define VSYS_6P0_D200UR_INT_MASK        BIT(VSYS_6P0_D200UR_INT)
> +#define VSYS_UV_D3R_INT_MASK            BIT(VSYS_UV_D3R_INT)
> +#define VSYS_2P5_R_INT_MASK             BIT(VSYS_2P5_R_INT)
> +#define OTMP_D1R_INT_MASK               BIT(OTMP_D1R_INT)
>  
>  struct hi655x_pmic {
>  	struct resource *res;

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
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