From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754860AbcFUAtZ (ORCPT ); Mon, 20 Jun 2016 20:49:25 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:51674 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752961AbcFUAs6 (ORCPT ); Mon, 20 Jun 2016 20:48:58 -0400 Date: Mon, 20 Jun 2016 17:48:46 -0700 From: Stephen Boyd To: Roman Volkov Cc: Arnd Bergmann , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Michael Turquette , Roman Volkov , Tony Prisk Subject: Re: [PATCH v2 2/2] clk: vt8500: rework wm8650_find_pll_bits() Message-ID: <20160621004846.GL1521@codeaurora.org> References: <20160607215610.8724-1-v1ron@mail.ru> <20160607215610.8724-3-v1ron@mail.ru> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20160607215610.8724-3-v1ron@mail.ru> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 06/08, Roman Volkov wrote: > From: Roman Volkov > > PLL clock on WM8650 is calculated in the following way: > > M * parent [O1] => / P [O2] => / D [O3] > > Where O2 is 600MHz >= (M * parent) / P >= 300MHz. > > Current algorithm does not met this requirement, so that the > function may return rates which are not supported by the hardware. > > This patch fixes the algorithm and simplifies the code, reducing > the calculation time by ~10000 times (according to usermode app) by > removing the nested loops. > > Signed-off-by: Roman Volkov > --- Applied to clk-next -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project