From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752404AbcFWTdf (ORCPT ); Thu, 23 Jun 2016 15:33:35 -0400 Received: from megous.com ([83.167.254.221]:35721 "EHLO xff.cz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751965AbcFWTcZ (ORCPT ); Thu, 23 Jun 2016 15:32:25 -0400 From: megous@megous.com To: dev@linux-sunxi.org Cc: linux-arm-kernel@lists.infradead.org, Ondrej Jirman , Rob Herring , Mark Rutland , Russell King , Maxime Ripard , Chen-Yu Tsai , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 05/14] ARM: dts: sun8i: Add THS node to the sun8i-h3.dtsi Date: Thu, 23 Jun 2016 21:20:55 +0200 Message-Id: <20160623192104.18720-6-megous@megous.com> X-Mailer: git-send-email 2.9.0 In-Reply-To: <20160623192104.18720-1-megous@megous.com> References: <20160623192104.18720-1-megous@megous.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ondrej Jirman This patch adds nodes for the THS driver and the THS clock to the Allwinner sun8i-h3.dtsi file. Signed-off-by: Ondrej Jirman --- arch/arm/boot/dts/sun8i-h3.dtsi | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi index 172576d..9938972 100644 --- a/arch/arm/boot/dts/sun8i-h3.dtsi +++ b/arch/arm/boot/dts/sun8i-h3.dtsi @@ -77,6 +77,14 @@ }; }; + thermal-zones { + cpu_thermal: cpu_thermal { + polling-delay-passive = <330>; + polling-delay = <1000>; + thermal-sensors = <&ths 0>; + }; + }; + timer { compatible = "arm,armv7-timer"; interrupts = , @@ -239,6 +247,14 @@ "bus_scr", "bus_ephy", "bus_dbg"; }; + ths_clk: clk@01c20074 { + #clock-cells = <0>; + compatible = "allwinner,sun8i-h3-ths-clk"; + reg = <0x01c20074 0x4>; + clocks = <&osc24M>; + clock-output-names = "ths"; + }; + mmc0_clk: clk@01c20088 { #clock-cells = <1>; compatible = "allwinner,sun4i-a10-mmc-clk"; @@ -394,6 +410,10 @@ reg = <0x01c14000 0x400>; #address-cells = <1>; #size-cells = <1>; + + ths_calibration: calib@234 { + reg = <0x234 0x4>; + }; }; usbphy: phy@01c19400 { @@ -581,6 +601,19 @@ interrupts = ; }; + ths: ths@01c25000 { + #thermal-sensor-cells = <0>; + compatible = "allwinner,sun8i-h3-ths"; + reg = <0x01c25000 0x400>; + interrupts = ; + resets = <&apb1_rst 8>; + reset-names = "ahb"; + clocks = <&bus_gates 72>, <&ths_clk>; + clock-names = "ahb", "ths"; + nvmem-cells = <&ths_calibration>; + nvmem-cell-names = "calibration"; + }; + uart0: serial@01c28000 { compatible = "snps,dw-apb-uart"; reg = <0x01c28000 0x400>; -- 2.9.0