From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752433AbcF1SkR (ORCPT ); Tue, 28 Jun 2016 14:40:17 -0400 Received: from mga09.intel.com ([134.134.136.24]:23872 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751419AbcF1SkP (ORCPT ); Tue, 28 Jun 2016 14:40:15 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.26,542,1459839600"; d="scan'208";a="130095343" Date: Tue, 28 Jun 2016 11:34:14 -0700 From: yunhong jiang To: Paolo Bonzini Cc: Wanpeng Li , linux-kernel@vger.kernel.org, kvm@vger.kernel.org, Wanpeng Li , Radim =?UTF-8?B?S3LEjW3DocWZ?= , Yunhong Jiang Subject: Re: [PATCH] KVM: vmx: fix underflow in TSC deadline calculation Message-ID: <20160628113414.18f637b5@jnakajim-build> In-Reply-To: <640874638.2724253.1467136598812.JavaMail.zimbra@redhat.com> References: <1467096859-3143-1-git-send-email-wanpeng.li@hotmail.com> <20160628104547.4844fd2e@jnakajim-build> <640874638.2724253.1467136598812.JavaMail.zimbra@redhat.com> Organization: otc X-Mailer: Claws Mail 3.11.1 (GTK+ 2.24.28; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 28 Jun 2016 13:56:38 -0400 (EDT) Paolo Bonzini wrote: > > > > > diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c > > > index fdc05ae..b15e32a 100644 > > > --- a/arch/x86/kvm/lapic.c > > > +++ b/arch/x86/kvm/lapic.c > > > @@ -1454,11 +1454,18 @@ static void start_apic_timer(struct > > > kvm_lapic *apic) /* lapic timer in tsc deadline mode */ > > > u64 tscdeadline = apic->lapic_timer.tscdeadline; > > > > > > - if (kvm_x86_ops->set_hv_timer && > > > - !kvm_x86_ops->set_hv_timer(apic->vcpu, > > > tscdeadline)) { > > > - apic->lapic_timer.hv_timer_in_use = true; > > > - > > > trace_kvm_hv_timer_state(apic->vcpu->vcpu_id, > > > + if (kvm_x86_ops->set_hv_timer) { > > > + if (kvm_x86_ops->set_hv_timer(apic->vcpu, > > > > Would it be better that if set_hv_timer fails, we clear the vmx > > timer (i.e. the VMCS field) before return the failure? I'm not sure > > if it make sense to clear the previous setup if a new setup fails, > > although it seems OK for me, since we have to cancel the hv_timer > > anyway. > > Good question. I think we should abstract a little the set_hv_timer > and cancel_hv_timer calls, for example with a new function > start_hv_tscdeadline. It's also simpler to avoid the race window by > disabling interrupts around the calls to set_hv_timer and > hrtimer_cancel. I'll see what I can come up with. Paolo, thanks for reply. Which race window you are talking about? Is it the kvm_lapic_switch_to_hv_timer()? If yes, hope we will not forgot it once the lapic timer is not pinned anymore in future. Thanks --jyh > > Paolo