From: Borislav Petkov <bp@suse.de>
To: "Yu, Fenghua" <fenghua.yu@intel.com>
Cc: "Luck, Tony" <tony.luck@intel.com>,
Thomas Gleixner <tglx@linutronix.de>, Ingo Molnar <mingo@elte.hu>,
"Anvin, H Peter" <h.peter.anvin@intel.com>,
Peter Zijlstra <peterz@infradead.org>,
Stephane Eranian <eranian@google.com>,
"Shankar, Ravi V" <ravi.v.shankar@intel.com>,
Vikas Shivappa <vikas.shivappa@linux.intel.com>,
linux-kernel <linux-kernel@vger.kernel.org>, x86 <x86@kernel.org>
Subject: Re: [PATCH] cacheinfo: Introduce cache id
Date: Mon, 4 Jul 2016 19:58:26 +0200 [thread overview]
Message-ID: <20160704175826.GC6349@pd.tnic> (raw)
In-Reply-To: <3E5A0FA7E9CA944F9D5414FEC6C712205DFD182F@ORSMSX106.amr.corp.intel.com>
On Fri, Jul 01, 2016 at 07:24:27PM +0000, Yu, Fenghua wrote:
> I haven't tested on AMD. But I think AMD should have the same code.
Again, bear in mind, this is a qemu+kvm guest.
> Could you please check if
> /sys/device/system/cpu/cpu#/cache/index#/shared_cpu_map contains only
> the cpu itself?
Yes it does:
$ grep . -EriIn /sys/devices/system/cpu/cpu*/cache/index*/shared_cpu_map
/sys/devices/system/cpu/cpu0/cache/index0/shared_cpu_map:1:01
/sys/devices/system/cpu/cpu0/cache/index1/shared_cpu_map:1:01
/sys/devices/system/cpu/cpu0/cache/index2/shared_cpu_map:1:01
/sys/devices/system/cpu/cpu1/cache/index0/shared_cpu_map:1:02
/sys/devices/system/cpu/cpu1/cache/index1/shared_cpu_map:1:02
/sys/devices/system/cpu/cpu1/cache/index2/shared_cpu_map:1:02
/sys/devices/system/cpu/cpu2/cache/index0/shared_cpu_map:1:04
/sys/devices/system/cpu/cpu2/cache/index1/shared_cpu_map:1:04
/sys/devices/system/cpu/cpu2/cache/index2/shared_cpu_map:1:04
/sys/devices/system/cpu/cpu3/cache/index0/shared_cpu_map:1:08
/sys/devices/system/cpu/cpu3/cache/index1/shared_cpu_map:1:08
/sys/devices/system/cpu/cpu3/cache/index2/shared_cpu_map:1:08
/sys/devices/system/cpu/cpu4/cache/index0/shared_cpu_map:1:10
/sys/devices/system/cpu/cpu4/cache/index1/shared_cpu_map:1:10
/sys/devices/system/cpu/cpu4/cache/index2/shared_cpu_map:1:10
/sys/devices/system/cpu/cpu5/cache/index0/shared_cpu_map:1:20
/sys/devices/system/cpu/cpu5/cache/index1/shared_cpu_map:1:20
/sys/devices/system/cpu/cpu5/cache/index2/shared_cpu_map:1:20
/sys/devices/system/cpu/cpu6/cache/index0/shared_cpu_map:1:40
/sys/devices/system/cpu/cpu6/cache/index1/shared_cpu_map:1:40
/sys/devices/system/cpu/cpu6/cache/index2/shared_cpu_map:1:40
/sys/devices/system/cpu/cpu7/cache/index0/shared_cpu_map:1:80
/sys/devices/system/cpu/cpu7/cache/index1/shared_cpu_map:1:80
/sys/devices/system/cpu/cpu7/cache/index2/shared_cpu_map:1:80
Here's the same from a real AMD system:
grep . -EriIn /sys/devices/system/cpu/cpu*/cache/index*/shared_cpu_map
/sys/devices/system/cpu/cpu0/cache/index0/shared_cpu_map:1:01
/sys/devices/system/cpu/cpu0/cache/index1/shared_cpu_map:1:01
/sys/devices/system/cpu/cpu0/cache/index2/shared_cpu_map:1:01
/sys/devices/system/cpu/cpu0/cache/index3/shared_cpu_map:1:3f
/sys/devices/system/cpu/cpu1/cache/index0/shared_cpu_map:1:02
/sys/devices/system/cpu/cpu1/cache/index1/shared_cpu_map:1:02
/sys/devices/system/cpu/cpu1/cache/index2/shared_cpu_map:1:02
/sys/devices/system/cpu/cpu1/cache/index3/shared_cpu_map:1:3f
/sys/devices/system/cpu/cpu2/cache/index0/shared_cpu_map:1:04
/sys/devices/system/cpu/cpu2/cache/index1/shared_cpu_map:1:04
/sys/devices/system/cpu/cpu2/cache/index2/shared_cpu_map:1:04
/sys/devices/system/cpu/cpu2/cache/index3/shared_cpu_map:1:3f
/sys/devices/system/cpu/cpu3/cache/index0/shared_cpu_map:1:08
/sys/devices/system/cpu/cpu3/cache/index1/shared_cpu_map:1:08
/sys/devices/system/cpu/cpu3/cache/index2/shared_cpu_map:1:08
/sys/devices/system/cpu/cpu3/cache/index3/shared_cpu_map:1:3f
/sys/devices/system/cpu/cpu4/cache/index0/shared_cpu_map:1:10
/sys/devices/system/cpu/cpu4/cache/index1/shared_cpu_map:1:10
/sys/devices/system/cpu/cpu4/cache/index2/shared_cpu_map:1:10
/sys/devices/system/cpu/cpu4/cache/index3/shared_cpu_map:1:3f
/sys/devices/system/cpu/cpu5/cache/index0/shared_cpu_map:1:20
/sys/devices/system/cpu/cpu5/cache/index1/shared_cpu_map:1:20
/sys/devices/system/cpu/cpu5/cache/index2/shared_cpu_map:1:20
/sys/devices/system/cpu/cpu5/cache/index3/shared_cpu_map:1:3f
L3 is correctly shared between all cores.
> From the cache id you dump on KVM, it tells there are 8 cache leaf 0,
> 8 cache leaf 1, and 8 cache leaf 2. That means each CPU has its own
> 3 caches (I can't tell from the cache id which level they are. The
> cache/index#/level will tell that).
>
> If this is not the case, maybe cache id doesn't work on AMD. Maybe I
> don't enable cache id for AMD?
Nah, leave it as it is. Who knows what we might use it for on AMD.
> From the info, cache id on one level is unique on that level across the board.
Same on the AMD box:
$ grep . -EriIn /sys/devices/system/cpu/cpu*/cache/index*/id
/sys/devices/system/cpu/cpu0/cache/index0/id:1:0
/sys/devices/system/cpu/cpu0/cache/index1/id:1:0
/sys/devices/system/cpu/cpu0/cache/index2/id:1:0
/sys/devices/system/cpu/cpu0/cache/index3/id:1:0
/sys/devices/system/cpu/cpu1/cache/index0/id:1:1
/sys/devices/system/cpu/cpu1/cache/index1/id:1:1
/sys/devices/system/cpu/cpu1/cache/index2/id:1:1
/sys/devices/system/cpu/cpu1/cache/index3/id:1:1
/sys/devices/system/cpu/cpu2/cache/index0/id:1:2
/sys/devices/system/cpu/cpu2/cache/index1/id:1:2
/sys/devices/system/cpu/cpu2/cache/index2/id:1:2
/sys/devices/system/cpu/cpu2/cache/index3/id:1:2
/sys/devices/system/cpu/cpu3/cache/index0/id:1:3
/sys/devices/system/cpu/cpu3/cache/index1/id:1:3
/sys/devices/system/cpu/cpu3/cache/index2/id:1:3
/sys/devices/system/cpu/cpu3/cache/index3/id:1:3
/sys/devices/system/cpu/cpu4/cache/index0/id:1:4
/sys/devices/system/cpu/cpu4/cache/index1/id:1:4
/sys/devices/system/cpu/cpu4/cache/index2/id:1:4
/sys/devices/system/cpu/cpu4/cache/index3/id:1:4
/sys/devices/system/cpu/cpu5/cache/index0/id:1:5
/sys/devices/system/cpu/cpu5/cache/index1/id:1:5
/sys/devices/system/cpu/cpu5/cache/index2/id:1:5
/sys/devices/system/cpu/cpu5/cache/index3/id:1:5
> /sys/devices/system/cpu/cpu0/cache/index0/id:0
> /sys/devices/system/cpu/cpu0/cache/index1/id:0
> /sys/devices/system/cpu/cpu0/cache/index2/id:0
> /sys/devices/system/cpu/cpu0/cache/index3/id:0
> /sys/devices/system/cpu/cpu10/cache/index0/id:17
> /sys/devices/system/cpu/cpu10/cache/index1/id:17
> /sys/devices/system/cpu/cpu10/cache/index2/id:17
Hmm, so non-L3 caches, i.e., the unshared ones, have different IDs from
the CPU numbers. That's probably because we use the APIC IDs to generate
the cache IDs. Not that it matters too much...
...
> /sys/devices/system/cpu/cpu0/cache/index0/shared_cpu_list:0,36
> /sys/devices/system/cpu/cpu0/cache/index1/shared_cpu_list:0,36
> /sys/devices/system/cpu/cpu0/cache/index2/shared_cpu_list:0,36
> /sys/devices/system/cpu/cpu0/cache/index3/shared_cpu_list:0-17,36-53
Right, and this shows what is shared by what.
--
Regards/Gruss,
Boris.
SUSE Linux GmbH, GF: Felix Imendörffer, Jane Smithard, Graham Norton, HRB 21284 (AG Nürnberg)
--
prev parent reply other threads:[~2016-07-04 17:58 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-30 1:56 [PATCH] cacheinfo: Introduce cache id Fenghua Yu
2016-06-30 1:56 ` Fenghua Yu
2016-07-01 10:21 ` Borislav Petkov
2016-07-01 16:50 ` Luck, Tony
2016-07-01 17:27 ` Borislav Petkov
2016-07-01 18:00 ` Luck, Tony
2016-07-01 18:29 ` Borislav Petkov
2016-07-01 18:32 ` Yu, Fenghua
2016-07-01 18:40 ` Borislav Petkov
2016-07-01 19:08 ` Yu, Fenghua
2016-07-04 17:29 ` Borislav Petkov
2016-07-01 18:01 ` Yu, Fenghua
2016-07-01 18:35 ` Borislav Petkov
2016-07-01 19:24 ` Yu, Fenghua
2016-07-04 17:58 ` Borislav Petkov [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20160704175826.GC6349@pd.tnic \
--to=bp@suse.de \
--cc=eranian@google.com \
--cc=fenghua.yu@intel.com \
--cc=h.peter.anvin@intel.com \
--cc=linux-kernel@vger.kernel.org \
--cc=mingo@elte.hu \
--cc=peterz@infradead.org \
--cc=ravi.v.shankar@intel.com \
--cc=tglx@linutronix.de \
--cc=tony.luck@intel.com \
--cc=vikas.shivappa@linux.intel.com \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox