From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753108AbcGFIsK (ORCPT ); Wed, 6 Jul 2016 04:48:10 -0400 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:5455 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751182AbcGFIsF (ORCPT ); Wed, 6 Jul 2016 04:48:05 -0400 X-IBM-Helo: d06dlp03.portsmouth.uk.ibm.com X-IBM-MailFrom: schwidefsky@de.ibm.com X-IBM-RcptTo: linux-kernel@vger.kernel.org Date: Wed, 6 Jul 2016 10:47:53 +0200 From: Martin Schwidefsky To: "Hillf Danton" Cc: "'linux-kernel'" , Subject: Re: [PATCH 2/2] s390/mm: use ipte range to invalidate multiple page table entries In-Reply-To: <015301d1d751$8973de50$9c5b9af0$@alibaba-inc.com> References: <014201d1d738$744c8f90$5ce5aeb0$@alibaba-inc.com> <014601d1d73b$5a3c0420$0eb40c60$@alibaba-inc.com> <20160706082350.5c56ca40@mschwide> <015301d1d751$8973de50$9c5b9af0$@alibaba-inc.com> X-Mailer: Claws Mail 3.9.3 (GTK+ 2.24.23; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 16070608-0020-0000-0000-000001CE6179 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 16070608-0021-0000-0000-00001CA09D7C Message-Id: <20160706104753.74daeaa2@mschwide> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2016-07-06_05:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1604210000 definitions=main-1607060078 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 06 Jul 2016 14:42:16 +0800 "Hillf Danton" wrote: > > > > > > > > +void ptep_invalidate_range(struct mm_struct *mm, unsigned long start, > > > > + unsigned long end, pte_t *ptep) > > > > +{ > > > > + unsigned long nr; > > > > + > > > > + if (!MACHINE_HAS_IPTE_RANGE || mm_has_pgste(mm)) > > > > + return; > > > > + preempt_disable(); > > > > + nr = (end - start) >> PAGE_SHIFT; > > > > + /* If the flush is likely to be local skip the ipte range */ > > > > + if (nr && !cpumask_equal(mm_cpumask(mm), > > > > + cpumask_of(smp_processor_id()))) > > > > > > s/smp/raw_smp/ to avoid adding schedule entry with page table > > > lock held? > > > > There can not be a schedule entry with either the page table lock held > > or the preempt_disable() a few lines above. > > > Yes, Sir. > > > > > + __ptep_ipte_range(start, nr - 1, ptep); > > > > + preempt_enable(); > > Then would you please, Sir, take a look at another case where > preempt is enabled? You are still a bit cryptic, are you trying to tell me that your hint is about trying to avoid the preempt_enable() call? The reason why I added the preempt_disable()/preempt_enable() pair to ptep_invalidate_range is that I recently got bitten by a preempt problem in the ptep_xchg_lazy() function which is used for ptep_get_and_clear(). Now ptep_get_and_clear() is used in vunmap_pte_range() which is called while preemption is allowed. To keep things symmetrical it seems sensible to explicitely disable preemption on all ptep_xxx code paths with cpu mask checks, no? -- blue skies, Martin. "Reality continues to ruin my life." - Calvin.