public inbox for linux-kernel@vger.kernel.org
 help / color / mirror / Atom feed
From: Rob Herring <robh@kernel.org>
To: Heiko Stuebner <heiko@sntech.de>
Cc: William Wu <william.wu@rock-chips.com>,
	gregkh@linuxfoundation.org, balbi@kernel.org,
	linux-rockchip@lists.infradead.org, briannorris@google.com,
	dianders@google.com, kever.yang@rock-chips.com,
	huangtao@rock-chips.com, frank.wang@rock-chips.com,
	eddie.cai@rock-chips.com, John.Youn@synopsys.com,
	linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org,
	sergei.shtylyov@cogentembedded.com, mark.rutland@arm.com,
	devicetree@vger.kernel.org
Subject: Re: [PATCH v6 3/5] usb: dwc3: add phyif_utmi_quirk
Date: Mon, 11 Jul 2016 09:54:47 -0500	[thread overview]
Message-ID: <20160711145447.GA16636@rob-hp-laptop> (raw)
In-Reply-To: <2213342.0Nx5tnEW8p@phil>

On Fri, Jul 08, 2016 at 02:33:09PM +0200, Heiko Stuebner wrote:
> Hi William,
> 
> Am Donnerstag, 7. Juli 2016, 10:54:24 schrieb William Wu:
> > Add a quirk to configure the core to support the
> > UTMI+ PHY with an 8- or 16-bit interface. UTMI+ PHY
> > interface is hardware property, and it's platform
> > dependent. Normall, the PHYIf can be configured
> > during coreconsultant. But for some specific usb
> > cores(e.g. rk3399 soc dwc3), the default PHYIf
> > configuration value is fault, so we need to
> > reconfigure it by software.
> > 
> > And refer to the dwc3 databook, the GUSB2PHYCFG.USBTRDTIM
> > must be set to the corresponding value according to
> > the UTMI+ PHY interface.
> > 
> > Signed-off-by: William Wu <william.wu@rock-chips.com>
> > ---
> [...]
> > diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt
> > b/Documentation/devicetree/bindings/usb/dwc3.txt index 020b0e9..8d7317d
> > 100644
> > --- a/Documentation/devicetree/bindings/usb/dwc3.txt
> > +++ b/Documentation/devicetree/bindings/usb/dwc3.txt
> > @@ -42,6 +42,10 @@ Optional properties:
> >   - snps,dis-u2-freeclk-exists-quirk: when set, clear the
> > u2_freeclk_exists in GUSB2PHYCFG, specify that USB2 PHY doesn't provide
> >  			a free-running PHY clock.
> > + - snps,phyif-utmi-quirk: when set core will set phyif UTMI+ interface.
> > + - snps,phyif-utmi: the value to configure the core to support a UTMI+
> > PHY +			with an 8- or 16-bit interface. Value 0 select 8-bit
> > +			interface, value 1 select 16-bit interface.
> 
> maybe
> 	snps,phyif-utmi-width = <8> or <16>;

Seems like this could be common. Any other bindings have something 
similar already? If not "utmi-width" is fine.

> 
> devicetree is about describing the hardware, not the things that get written 
> to registers :-) . The conversion from the described width to the register 
> value can easily be done in the driver.
> 
> 
> Also I don't think you need two properties for this. If the snps,phyif-utmi 
> property is specified it indicates that you want to manually set the width 
> and if it is absent you want to use the IC default. All functions reading 
> property-values indicate if the property is missing.

Agreed.

Rob

  parent reply	other threads:[~2016-07-11 14:54 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-07-07  2:54 [PATCH v6 0/5] support rockchip dwc3 driver William Wu
2016-07-07  2:54 ` [PATCH v6 1/5] usb: dwc3: of-simple: add compatible for rockchip rk3399 William Wu
2016-07-07  2:54 ` [PATCH v6 2/5] usb: dwc3: add dis_u2_freeclk_exists_quirk William Wu
2016-07-11 14:47   ` Rob Herring
2016-07-07  2:54 ` [PATCH v6 3/5] usb: dwc3: add phyif_utmi_quirk William Wu
2016-07-08 12:33   ` Heiko Stuebner
2016-07-08 13:29     ` Felipe Balbi
2016-07-09  3:38       ` William.wu
2016-07-09 23:47         ` Heiko Stuebner
2016-07-13  3:21           ` William.wu
2016-07-11 14:54     ` Rob Herring [this message]
2016-07-13  3:39       ` William.wu
2016-07-11 14:58   ` Rob Herring
2016-07-13  4:02     ` William.wu
2016-07-07  2:54 ` [PATCH v6 4/5] usb: dwc3: add dis_del_phy_power_chg_quirk William Wu
2016-07-11 15:11   ` Rob Herring
2016-07-07  2:58 ` [PATCH v6 5/5] usb: dwc3: rockchip: add devicetree bindings documentation William Wu
2016-07-11 15:13   ` Rob Herring
2016-07-13  4:05     ` William.wu

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20160711145447.GA16636@rob-hp-laptop \
    --to=robh@kernel.org \
    --cc=John.Youn@synopsys.com \
    --cc=balbi@kernel.org \
    --cc=briannorris@google.com \
    --cc=devicetree@vger.kernel.org \
    --cc=dianders@google.com \
    --cc=eddie.cai@rock-chips.com \
    --cc=frank.wang@rock-chips.com \
    --cc=gregkh@linuxfoundation.org \
    --cc=heiko@sntech.de \
    --cc=huangtao@rock-chips.com \
    --cc=kever.yang@rock-chips.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-rockchip@lists.infradead.org \
    --cc=linux-usb@vger.kernel.org \
    --cc=mark.rutland@arm.com \
    --cc=sergei.shtylyov@cogentembedded.com \
    --cc=william.wu@rock-chips.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox