From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751780AbcGMRS3 (ORCPT ); Wed, 13 Jul 2016 13:18:29 -0400 Received: from www.linutronix.de ([62.245.132.108]:39863 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751153AbcGMRS0 (ORCPT ); Wed, 13 Jul 2016 13:18:26 -0400 Message-Id: <20160713153333.069777215@linutronix.de> User-Agent: quilt/0.63-1 Date: Wed, 13 Jul 2016 17:16:04 -0000 From: Anna-Maria Gleixner To: LKML Cc: Peter Zijlstra , Ingo Molnar , Thomas Gleixner , rt@linutronix.de, Richard Cochran , Sebastian Andrzej Siewior , Jason Cooper , Linus Torvalds , Marc Zyngier , Anna-Maria Gleixner Subject: [patch V2 03/67] irqchip/gic: Convert to hotplug state machine References: <20160713153219.128052238@linutronix.de> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-15 Content-Disposition: inline; filename=0002-irqchip-gic-Convert-to-hotplug-state-machine.patch X-Linutronix-Spam-Score: -1.0 X-Linutronix-Spam-Level: - X-Linutronix-Spam-Status: No , -1.0 points, 5.0 required, ALL_TRUSTED=-1,SHORTCIRCUIT=-0.0001,URIBL_BLOCKED=0.001 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Richard Cochran More or less straightforward, although this driver sports some very interesting SMP setup code. Regarding the callback ordering, this deleted comment is interesting: ... the GIC needs to be up before the ARM generic timers. That comment is half baken as the same requirement is true for perf. Signed-off-by: Richard Cochran Reviewed-by: Sebastian Andrzej Siewior Cc: Jason Cooper Cc: Linus Torvalds Cc: Marc Zyngier Cc: Peter Zijlstra Cc: Thomas Gleixner Signed-off-by: Anna-Maria Gleixner --- drivers/irqchip/irq-gic.c | 23 ++++++----------------- include/linux/cpuhotplug.h | 1 + 2 files changed, 7 insertions(+), 17 deletions(-) diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index fbc4ae2..606f114 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -984,25 +984,12 @@ static int gic_irq_domain_translate(struct irq_domain *d, return -EINVAL; } -#ifdef CONFIG_SMP -static int gic_secondary_init(struct notifier_block *nfb, unsigned long action, - void *hcpu) +static int gic_starting_cpu(unsigned int cpu) { - if (action == CPU_STARTING || action == CPU_STARTING_FROZEN) - gic_cpu_init(&gic_data[0]); - return NOTIFY_OK; + gic_cpu_init(&gic_data[0]); + return 0; } -/* - * Notifier for enabling the GIC CPU interface. Set an arbitrarily high - * priority because the GIC needs to be up before the ARM generic timers. - */ -static struct notifier_block gic_cpu_notifier = { - .notifier_call = gic_secondary_init, - .priority = 100, -}; -#endif - static int gic_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, unsigned int nr_irqs, void *arg) { @@ -1148,8 +1135,10 @@ static int __init __gic_init_bases(struct gic_chip_data *gic, int irq_start, gic_cpu_map[i] = 0xff; #ifdef CONFIG_SMP set_smp_cross_call(gic_raise_softirq); - register_cpu_notifier(&gic_cpu_notifier); #endif + cpuhp_setup_state_nocalls(CPUHP_AP_IRQ_GIC_STARTING, + "AP_IRQ_GIC_STARTING", + gic_starting_cpu, NULL); set_handle_irq(gic_handle_irq); if (static_key_true(&supports_deactivate)) pr_info("GIC: Using split EOI/Deactivate mode\n"); diff --git a/include/linux/cpuhotplug.h b/include/linux/cpuhotplug.h index fe05640..edc8adf 100644 --- a/include/linux/cpuhotplug.h +++ b/include/linux/cpuhotplug.h @@ -9,6 +9,7 @@ enum cpuhp_state { CPUHP_AP_IDLE_DEAD, CPUHP_AP_OFFLINE, CPUHP_AP_SCHED_STARTING, + CPUHP_AP_IRQ_GIC_STARTING, CPUHP_AP_NOTIFY_STARTING, CPUHP_AP_ONLINE, CPUHP_TEARDOWN_CPU, -- 2.8.1