Re: [PATCH 4/9] clk: sunxi-ng: mux: Add support for mux tables

Jean-Francois Moine
2016-07-26T17:43:12Z

On Tue, 26 Jul 2016 15:04:26 +0800
Chen-Yu Tsai <wens@csie.org> wrote:

> Some clock muxes have holes, i.e. invalid or unconnected inputs,
> between parent mux values.
>
> Add support for specifying a mux table to map clock parents to
> mux values.

Putting empty strings in the holes should work. No?
Ex:

static const char * const csi_mclk_parents[] =
{ "pll-video0", "pll-video1", "", "", "", "osc24M" };

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