From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752427AbcG2AD4 (ORCPT ); Thu, 28 Jul 2016 20:03:56 -0400 Received: from mga02.intel.com ([134.134.136.20]:48786 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752149AbcG2ADx (ORCPT ); Thu, 28 Jul 2016 20:03:53 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.28,436,1464678000"; d="scan'208";a="1004567993" Date: Thu, 28 Jul 2016 17:03:52 -0700 From: Matt Roper To: Lyude Cc: intel-gfx@lists.freedesktop.org, Maarten Lankhorst , Ville =?iso-8859-1?Q?Syrj=E4l=E4?= , David Airlie , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Daniel Vetter Subject: Re: [Intel-gfx] [PATCH v4 0/6] Finally fix watermarks Message-ID: <20160729000352.GR32025@intel.com> References: <1469554483-24999-1-git-send-email-cpaul@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1469554483-24999-1-git-send-email-cpaul@redhat.com> User-Agent: Mutt/1.5.20 (2009-06-14) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This is completely untested (and probably horribly broken/buggy), but here's a quick mockup of the general approach I was thinking for ensuring DDB & WM's can be updated together while ensuring the three-step pipe flushing process is honored: https://github.com/mattrope/kernel/commits/experimental/lyude_ddb Basically the idea is to take note of what's happening to the pipe's DDB allocation (shrinking, growing, unchanged, etc.) during the atomic check phase; then during the commit phase, we loop over the CRTC's three times instead of just once, but only operate on a subset of the CRTC's in each loop. While operating on each CRTC, the plane, WM, and DDB all get programmed together and have a single flush for all three. Matt On Tue, Jul 26, 2016 at 01:34:36PM -0400, Lyude wrote: > Latest version of https://lkml.org/lkml/2016/7/26/290 . Resending the whole > thing to keep it in one place. > > Lyude (5): > drm/i915/skl: Add support for the SAGV, fix underrun hangs > drm/i915/skl: Only flush pipes when we change the ddb allocation > drm/i915/skl: Fix extra whitespace in skl_flush_wm_values() > drm/i915/skl: Update plane watermarks atomically during plane updates > drm/i915/skl: Always wait for pipes to update after a flush > > Matt Roper (1): > drm/i915/gen9: Only copy WM results for changed pipes to skl_hw > > drivers/gpu/drm/i915/i915_drv.h | 3 + > drivers/gpu/drm/i915/i915_reg.h | 5 + > drivers/gpu/drm/i915/intel_display.c | 24 ++++ > drivers/gpu/drm/i915/intel_drv.h | 4 + > drivers/gpu/drm/i915/intel_pm.c | 240 +++++++++++++++++++++++++++++++---- > drivers/gpu/drm/i915/intel_sprite.c | 2 + > 6 files changed, 255 insertions(+), 23 deletions(-) > > -- > 2.7.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Matt Roper Graphics Software Engineer IoTG Platform Enabling & Development Intel Corporation (916) 356-2795