From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1030308AbcHEGK5 (ORCPT ); Fri, 5 Aug 2016 02:10:57 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:50585 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1030272AbcHEGK4 (ORCPT ); Fri, 5 Aug 2016 02:10:56 -0400 X-IBM-Helo: d03dlp02.boulder.ibm.com X-IBM-MailFrom: sukadev@linux.vnet.ibm.com Date: Thu, 4 Aug 2016 23:10:41 -0700 From: Sukadev Bhattiprolu To: Michael Ellerman Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Subject: [PATCH 1/2] powerpc/pseries: Use a helper to fixup nr_cores MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline X-Operating-System: Linux 2.0.32 on an i486 User-Agent: Mutt/1.5.21 (2010-09-15) X-TM-AS-GCONF: 00 X-Content-Scanned: Fidelis XPS MAILER x-cbid: 16080506-0024-0000-0000-00001443A2E6 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00005549; HX=3.00000240; KW=3.00000007; PH=3.00000004; SC=3.00000178; SDB=6.00740227; UDB=6.00348128; IPR=6.00512809; BA=6.00004644; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00012168; XFM=3.00000011; UTC=2016-08-05 06:10:47 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 16080506-0025-0000-0000-0000434C9014 Message-Id: <20160805061041.GA31857@us.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2016-08-05_04:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1604210000 definitions=main-1608050084 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org >>From d49b597623ac58fa1ab61ce0157470b6390e9a67 Mon Sep 17 00:00:00 2001 From: Sukadev Bhattiprolu Date: Fri, 5 Aug 2016 00:01:54 -0400 Subject: [PATCH 1/2] powerpc/pseries: Use a helper to fixup nr_cores. We have to fixup RMA size also, so using helpers will make it cleaner and consistent. Signed-off-by: Sukadev Bhattiprolu --- arch/powerpc/kernel/prom_init.c | 70 ++++++++++++++++++++++------------------- 1 file changed, 38 insertions(+), 32 deletions(-) diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c index 6ee4b72..f612a99 100644 --- a/arch/powerpc/kernel/prom_init.c +++ b/arch/powerpc/kernel/prom_init.c @@ -863,47 +863,53 @@ static int __init prom_count_smt_threads(void) } +static void fixup_nr_cores(void) +{ + u32 cores; + unsigned char *ptcores; + + /* We need to tell the FW about the number of cores we support. + * + * To do that, we count the number of threads on the first core + * (we assume this is the same for all cores) and use it to + * divide NR_CPUS. + */ + + /* The core value may start at an odd address. If such a word + * access is made at a cache line boundary, this leads to an + * exception which may not be handled at this time. + * Forcing a per byte access to avoid exception. + */ + ptcores = &ibm_architecture_vec[IBM_ARCH_VEC_NRCORES_OFFSET]; + cores = 0; + cores |= ptcores[0] << 24; + cores |= ptcores[1] << 16; + cores |= ptcores[2] << 8; + cores |= ptcores[3]; + if (cores != NR_CPUS) { + prom_printf("WARNING ! " + "ibm_architecture_vec structure inconsistent: %lu!\n", + cores); + } else { + cores = DIV_ROUND_UP(NR_CPUS, prom_count_smt_threads()); + prom_printf("Max number of cores passed to firmware: %lu (NR_CPUS = %lu)\n", + cores, NR_CPUS); + ptcores[0] = (cores >> 24) & 0xff; + ptcores[1] = (cores >> 16) & 0xff; + ptcores[2] = (cores >> 8) & 0xff; + ptcores[3] = cores & 0xff; + } +} static void __init prom_send_capabilities(void) { ihandle root; prom_arg_t ret; - u32 cores; - unsigned char *ptcores; root = call_prom("open", 1, 1, ADDR("/")); if (root != 0) { - /* We need to tell the FW about the number of cores we support. - * - * To do that, we count the number of threads on the first core - * (we assume this is the same for all cores) and use it to - * divide NR_CPUS. - */ - /* The core value may start at an odd address. If such a word - * access is made at a cache line boundary, this leads to an - * exception which may not be handled at this time. - * Forcing a per byte access to avoid exception. - */ - ptcores = &ibm_architecture_vec[IBM_ARCH_VEC_NRCORES_OFFSET]; - cores = 0; - cores |= ptcores[0] << 24; - cores |= ptcores[1] << 16; - cores |= ptcores[2] << 8; - cores |= ptcores[3]; - if (cores != NR_CPUS) { - prom_printf("WARNING ! " - "ibm_architecture_vec structure inconsistent: %lu!\n", - cores); - } else { - cores = DIV_ROUND_UP(NR_CPUS, prom_count_smt_threads()); - prom_printf("Max number of cores passed to firmware: %lu (NR_CPUS = %lu)\n", - cores, NR_CPUS); - ptcores[0] = (cores >> 24) & 0xff; - ptcores[1] = (cores >> 16) & 0xff; - ptcores[2] = (cores >> 8) & 0xff; - ptcores[3] = cores & 0xff; - } + fixup_nr_cores(); /* try calling the ibm,client-architecture-support method */ prom_printf("Calling ibm,client-architecture-support..."); -- 1.8.3.1