From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932789AbcHXP45 (ORCPT ); Wed, 24 Aug 2016 11:56:57 -0400 Received: from mx1.redhat.com ([209.132.183.28]:34382 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932515AbcHXP4y (ORCPT ); Wed, 24 Aug 2016 11:56:54 -0400 Date: Wed, 24 Aug 2016 17:47:11 +0200 From: Oleg Nesterov To: Pratyush Anand Cc: linux-arm-kernel@lists.infradead.org, linux@arm.linux.org.uk, catalin.marinas@arm.com, will.deacon@arm.com, linux-kernel@vger.kernel.org, wcohen@redhat.com, dave.long@linaro.org, steve.capper@linaro.org, srikar@linux.vnet.ibm.com, vijaya.kumar@caviumnetworks.com, Shi Yang , Andre Przywara , Ard Biesheuvel , Ashok Kumar , James Morse , Jungseok Lee , "Kirill A. Shutemov" , Mark Rutland , Masami Hiramatsu , Robin Murphy , Sandeepa Prabhu , Shaokun Zhang , "Suzuki K. Poulose" , Vladimir Murzin Subject: Re: [PATCH 5/5] arm64: Add uprobe support Message-ID: <20160824154711.GA25531@redhat.com> References: <20160809184943.GA17112@redhat.com> <20160824071308.GA24311@localhost.localdomain> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20160824071308.GA24311@localhost.localdomain> User-Agent: Mutt/1.5.18 (2008-05-17) X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Wed, 24 Aug 2016 15:47:41 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Pratyush, On 08/24, Pratyush Anand wrote: > > > I don't think we want user_{enable,disable{_single_step in the long term, > > please look at 9bd1190a11c9d2 "uprobes/x86: Do not (ab)use TIF_SINGLESTEP > > /user_*_single_step() for single-stepping". it seems that ARM64 sets/clears > > TIF_SINGLESTEP. You can also lool at saved_tf logic, probably ARM64 needs > > the same. > > IIUC, then you mean that TIF_SINGLESTEP is a per task flag, Yes, and nobody but ptrace should use it, otherwise ptrace/uprobes can confuse each other. And uprobes simply doesn't need to set/clear it. > while > arch_uprobe_pre/post_xol() should enable/disable single stepping using a per > uprobe_task, I can't really answer since I know nothing about arm. x86 just needs to set X86_EFLAGS_TF, I guess arm needs to modify some register too? > and we should have a flag in "struct arch_uprobe_task" to handle > this, right? Probably yes, because we need to record/restore X86_EFLAGS_TF in case it was already set by ptrace or something else. > > However, I agree we can do this later and initial version can use these > > ptrace helpers. > > Yes, I would also like to do that change latter, because these set of patches > have already been tested heavily with systemtap, so it would be better to go > with an incremental changes latter on. Yes, yes, I agree. Let me repeat that this patch looks good to me as initial version, but obviously I can't really revit it and/or ack. Oleg.