From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756140AbcHYUN0 (ORCPT ); Thu, 25 Aug 2016 16:13:26 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:34121 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753773AbcHYUNL (ORCPT ); Thu, 25 Aug 2016 16:13:11 -0400 Date: Thu, 25 Aug 2016 13:02:28 -0700 From: Stephen Boyd To: Srinivas Kandagatla Cc: Andy Gross , David Brown , Michael Turquette , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 1/2] clk: gcc-msm8996: Fix pcie 2 pipe register offset Message-ID: <20160825200228.GO19826@codeaurora.org> References: <1472124047-22627-1-git-send-email-srinivas.kandagatla@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1472124047-22627-1-git-send-email-srinivas.kandagatla@linaro.org> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 08/25, Srinivas Kandagatla wrote: > This patch corrects the register offset for pcie2 pipe clock. > Offset according to datasheet is 0x6e018 instead of 0x6e108. > > Signed-off-by: Srinivas Kandagatla > --- Applied to clk-next -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project