From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753444AbcIBLR3 (ORCPT ); Fri, 2 Sep 2016 07:17:29 -0400 Received: from mga09.intel.com ([134.134.136.24]:31283 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752702AbcIBLR1 (ORCPT ); Fri, 2 Sep 2016 07:17:27 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.30,270,1470726000"; d="scan'208";a="874445352" Date: Fri, 2 Sep 2016 16:55:32 +0530 From: Vinod Koul To: Nicolin Chen Cc: jonathanh@nvidia.com, linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org, dmaengine@vger.kernel.org, gnurou@gmail.com, thierry.reding@gmail.com, swarren@wwwdotorg.org, ldewangan@nvidia.com Subject: Re: [PATCH] dmaengine: tegra210-adma: Add memcpy support Message-ID: <20160902112532.GG9355@localhost> References: <1472769797-31650-1-git-send-email-nicoleotsuka@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1472769797-31650-1-git-send-email-nicoleotsuka@gmail.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Sep 01, 2016 at 03:43:16PM -0700, Nicolin Chen wrote: > +#define ADMA_CH_CTRL_MODE_ONCE (1 << 8) BIT(8)? You should change the existing ones too :) > #define ADMA_CH_CTRL_MODE_CONTINUOUS (2 << 8) > +#define ADMA_CH_CTRL_MODE_LINKED_LIST (4 << 8) > #define ADMA_CH_CTRL_FLOWCTRL_EN BIT(1) > > #define ADMA_CH_CONFIG 0x28 > @@ -111,6 +115,7 @@ struct tegra_adma_desc { > size_t buf_len; > size_t period_len; > size_t num_periods; > + bool cyclic; Okay, i think this should be a separate preparatory patch > case DMA_DEV_TO_MEM: > adma_dir = ADMA_CH_CTRL_DIR_AHUB2MEM; > burst_size = fls(tdc->sconfig.src_maxburst); > - ch_regs->config = ADMA_CH_CONFIG_TRG_BUF(desc->num_periods - 1); > - ch_regs->ctrl = ADMA_CH_CTRL_RX_REQ(tdc->sreq_index); > + ch_regs->config = ADMA_CH_CONFIG_TRG_BUF(num_periods - 1); > + ch_regs->ctrl = ADMA_CH_CTRL_RX_REQ(tdc->sreq_index) | > + ADMA_CH_CTRL_MODE_CONTINUOUS | > + ADMA_CH_CTRL_FLOWCTRL_EN; why is this changing? > +static struct dma_async_tx_descriptor *tegra_adma_prep_dma_memcpy( > + struct dma_chan *dc, dma_addr_t dest, dma_addr_t src, > + size_t buf_len, unsigned long flags) > +{ > + struct tegra_adma_chan *tdc = to_tegra_adma_chan(dc); > + struct device *dev = dc->device->dev; > + struct tegra_adma_desc *desc = NULL; > + > + dev_dbg(dev, "%s channel: %d src=0x%llx dst=0x%llx len=%zu\n", > + __func__, dc->chan_id, (unsigned long long)src, > + (unsigned long long)dest, buf_len); > + > + if (unlikely(!tdc || !buf_len)) > + return NULL; > + > + desc = kzalloc(sizeof(*desc), GFP_NOWAIT); > + if (!desc) > + return NULL; > + > + desc->num_periods = 1; > + desc->buf_len = buf_len; > + desc->period_len = buf_len; should we perhaps rename this to length rather than period? -- ~Vinod