From: Borislav Petkov <bp@alien8.de>
To: X86 ML <x86@kernel.org>
Cc: LKML <linux-kernel@vger.kernel.org>
Subject: [PATCH 04/15] x86/RAS: Add syndrome support to mce_amd_inj
Date: Mon, 12 Sep 2016 09:59:30 +0200 [thread overview]
Message-ID: <20160912075941.24699-5-bp@alien8.de> (raw)
In-Reply-To: <20160912075941.24699-1-bp@alien8.de>
From: Yazen Ghannam <Yazen.Ghannam@amd.com>
Add a debugfs file which holds the error syndrome (written into
MCA_SYND) of an injected error. Only write it on SMCA systems. Update
README file, while at it.
Signed-off-by: Yazen Ghannam <Yazen.Ghannam@amd.com>
Cc: Aravind Gopalakrishnan <aravindksg.lkml@gmail.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: x86-ml <x86@kernel.org>
Link: http://lkml.kernel.org/r/1467633035-32080-3-git-send-email-Yazen.Ghannam@amd.com
Signed-off-by: Borislav Petkov <bp@suse.de>
---
arch/x86/ras/mce_amd_inj.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/x86/ras/mce_amd_inj.c b/arch/x86/ras/mce_amd_inj.c
index 1104515d5ad2..ff8eb1a9ce6d 100644
--- a/arch/x86/ras/mce_amd_inj.c
+++ b/arch/x86/ras/mce_amd_inj.c
@@ -68,6 +68,7 @@ static int inj_##reg##_set(void *data, u64 val) \
MCE_INJECT_SET(status);
MCE_INJECT_SET(misc);
MCE_INJECT_SET(addr);
+MCE_INJECT_SET(synd);
#define MCE_INJECT_GET(reg) \
static int inj_##reg##_get(void *data, u64 *val) \
@@ -81,10 +82,12 @@ static int inj_##reg##_get(void *data, u64 *val) \
MCE_INJECT_GET(status);
MCE_INJECT_GET(misc);
MCE_INJECT_GET(addr);
+MCE_INJECT_GET(synd);
DEFINE_SIMPLE_ATTRIBUTE(status_fops, inj_status_get, inj_status_set, "%llx\n");
DEFINE_SIMPLE_ATTRIBUTE(misc_fops, inj_misc_get, inj_misc_set, "%llx\n");
DEFINE_SIMPLE_ATTRIBUTE(addr_fops, inj_addr_get, inj_addr_set, "%llx\n");
+DEFINE_SIMPLE_ATTRIBUTE(synd_fops, inj_synd_get, inj_synd_set, "%llx\n");
/*
* Caller needs to be make sure this cpu doesn't disappear
@@ -258,6 +261,7 @@ static void prepare_msrs(void *info)
}
wrmsrl(MSR_AMD64_SMCA_MCx_MISC(b), i_mce.misc);
+ wrmsrl(MSR_AMD64_SMCA_MCx_SYND(b), i_mce.synd);
} else {
wrmsrl(MSR_IA32_MCx_STATUS(b), i_mce.status);
wrmsrl(MSR_IA32_MCx_ADDR(b), i_mce.addr);
@@ -275,6 +279,9 @@ static void do_inject(void)
if (i_mce.misc)
i_mce.status |= MCI_STATUS_MISCV;
+ if (i_mce.synd)
+ i_mce.status |= MCI_STATUS_SYNDV;
+
if (inj_type == SW_INJ) {
mce_inject_log(&i_mce);
return;
@@ -371,6 +378,9 @@ static const char readme_msg[] =
"\t used for error thresholding purposes and its validity is indicated by\n"
"\t MCi_STATUS[MiscV].\n"
"\n"
+"synd:\t Set MCi_SYND: provide syndrome info about the error. Only valid on\n"
+"\t Scalable MCA systems, and its validity is indicated by MCi_STATUS[SyndV].\n"
+"\n"
"addr:\t Error address value to be written to MCi_ADDR. Log address information\n"
"\t associated with the error.\n"
"\n"
@@ -420,6 +430,7 @@ static struct dfs_node {
{ .name = "status", .fops = &status_fops, .perm = S_IRUSR | S_IWUSR },
{ .name = "misc", .fops = &misc_fops, .perm = S_IRUSR | S_IWUSR },
{ .name = "addr", .fops = &addr_fops, .perm = S_IRUSR | S_IWUSR },
+ { .name = "synd", .fops = &synd_fops, .perm = S_IRUSR | S_IWUSR },
{ .name = "bank", .fops = &bank_fops, .perm = S_IRUSR | S_IWUSR },
{ .name = "flags", .fops = &flags_fops, .perm = S_IRUSR | S_IWUSR },
{ .name = "cpu", .fops = &extcpu_fops, .perm = S_IRUSR | S_IWUSR },
--
2.10.0
next prev parent reply other threads:[~2016-09-12 8:03 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-12 7:59 [PATCH 00/15] x86/RAS queue for 4.9 Borislav Petkov
2016-09-12 7:59 ` [PATCH 01/15] x86/mce/AMD: Use msr_ops.misc() in allocate_threshold_blocks() Borislav Petkov
2016-09-12 7:59 ` [PATCH 02/15] x86/mce: Add support for new MCA_SYND register Borislav Petkov
2016-09-12 7:59 ` [PATCH 03/15] EDAC/mce_amd: Print syndrome register value on SMCA systems Borislav Petkov
2016-09-12 7:59 ` Borislav Petkov [this message]
2016-09-12 7:59 ` [PATCH 05/15] x86/mce/AMD: Read MSRs on the CPU allocating the threshold blocks Borislav Petkov
2016-09-12 7:59 ` [PATCH 06/15] EDAC/mce_amd: Add missing SMCA error descriptions Borislav Petkov
2016-09-12 7:59 ` [PATCH 07/15] EDAC/mce_amd: Use SMCA prefix for error descriptions arrays Borislav Petkov
2016-09-12 7:59 ` [PATCH 08/15] x86/mce/AMD, EDAC/mce_amd: Define and use tables for known SMCA IP types Borislav Petkov
2016-09-12 7:59 ` [PATCH 09/15] x86/mce/AMD: Update sysfs bank names for SMCA systems Borislav Petkov
2016-09-12 7:59 ` [PATCH 10/15] x86/mce/AMD: Ensure the deferred error interrupt is of type APIC on " Borislav Petkov
2016-09-12 7:59 ` [PATCH 11/15] x86/mce/AMD: Save MCA_IPID in MCE struct " Borislav Petkov
2016-09-12 7:59 ` [PATCH 12/15] x86/mce, EDAC/mce_amd: Print MCA_SYND and MCA_IPID during MCE " Borislav Petkov
2016-09-12 7:59 ` [PATCH 13/15] x86/mce/AMD: Extract the error address " Borislav Petkov
2016-09-12 7:59 ` [PATCH 14/15] x86/MCE/AMD, EDAC: Handle reserved bank 4 on Fam17h properly Borislav Petkov
2016-09-12 7:59 ` [PATCH 15/15] x86/RAS/mce_amd_inj: Fix some W= warnings Borislav Petkov
2016-09-13 13:33 ` [tip:ras/core] " tip-bot for Borislav Petkov
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