From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757045AbcILJEI (ORCPT ); Mon, 12 Sep 2016 05:04:08 -0400 Received: from mga06.intel.com ([134.134.136.31]:41476 "EHLO mga06.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756837AbcILJEG (ORCPT ); Mon, 12 Sep 2016 05:04:06 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.30,322,1470726000"; d="scan'208";a="877757926" Date: Mon, 12 Sep 2016 12:04:01 +0300 From: Mika Westerberg To: Phidias Chiang Cc: Anisse Astier , Linus Walleij , Heikki Krogerus , Yu C Chen , "linux-gpio@vger.kernel.org" , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH] pinctrl: cherryview: Do not mask all interrupts on probe Message-ID: <20160912090401.GB1811@lahna.fi.intel.com> References: <20160818135813.GJ30827@lahna.fi.intel.com> <20160908101303.GA22716@ktx> <20160908102402.GC15313@lahna.fi.intel.com> <20160908162843.GB22716@ktx> <20160909061834.GG15313@lahna.fi.intel.com> <20160909082358.GA23895@ktx> <20160909085832.GK15313@lahna.fi.intel.com> <20160911080506.GO15313@lahna.fi.intel.com> <20160912065656.GA2411@ktx> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20160912065656.GA2411@ktx> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo User-Agent: Mutt/1.7.0 (2016-08-17) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Sep 12, 2016 at 02:56:56PM +0800, Phidias Chiang wrote: > On Sun, Sep 11, 2016 at 11:05:06AM +0300, Mika Westerberg wrote: > > On Fri, Sep 09, 2016 at 11:58:32AM +0300, Mika Westerberg wrote: > > > On Fri, Sep 09, 2016 at 04:23:58PM +0800, Phidias Chiang wrote: > > > > > > Only other place where we touch INTMASK register is > > > chv_gpio_irq_mask_unmask(). Can you add some debug there to find out the > > > caller? > > > > Something like this: > > > > diff --git a/drivers/pinctrl/intel/pinctrl-cherryview.c b/drivers/pinctrl/intel/pinctrl-cherryview.c > > index 0fe8fad..95fa3b1 100644 > > --- a/drivers/pinctrl/intel/pinctrl-cherryview.c > > +++ b/drivers/pinctrl/intel/pinctrl-cherryview.c > > @@ -1357,6 +1357,11 @@ static void chv_gpio_irq_mask_unmask(struct irq_data *d, bool mask) > > value |= BIT(intr_line); > > chv_writel(value, pctrl->regs + CHV_INTMASK); > > > > + if (printk_ratelimit()) { > > + dev_info(pctrl->dev, "%smask pin %u intmask 0x%08x\n", > > + mask ? "" : "un", pin, readl(pctrl->regs + CHV_INTMASK)); > > + } > > + > > raw_spin_unlock_irqrestore(&chv_lock, flags); > > } > > > > With printk_ratelimit(): > > [ 2.058485] cherryview-pinctrl INT33FF:00: INTMASK0: 0x00000006 > [ 2.058513] cherryview-pinctrl INT33FF:00: mask pin 0 intmask 0x00000006 > [ 2.058533] cherryview-pinctrl INT33FF:00: mask pin 1 intmask 0x00000006 > [ 2.058551] cherryview-pinctrl INT33FF:00: mask pin 2 intmask 0x00000006 > [ 2.058569] cherryview-pinctrl INT33FF:00: mask pin 3 intmask 0x00000006 > [ 2.058587] cherryview-pinctrl INT33FF:00: mask pin 4 intmask 0x00000006 > [ 2.058604] cherryview-pinctrl INT33FF:00: mask pin 5 intmask 0x00000006 > [ 2.058623] cherryview-pinctrl INT33FF:00: mask pin 6 intmask 0x00000006 > [ 2.058641] cherryview-pinctrl INT33FF:00: mask pin 7 intmask 0x00000006 > [ 2.058663] cherryview-pinctrl INT33FF:00: mask pin 15 intmask 0x00000006 > [ 2.059401] cherryview-pinctrl INT33FF:00: INTMASK1: 0x00000000 > [ 2.059551] cherryview-pinctrl INT33FF:01: INTMASK0: 0x00004000 > [ 2.061272] cherryview-pinctrl INT33FF:01: INTMASK1: 0x00000000 > [ 2.061516] cherryview-pinctrl INT33FF:02: INTMASK0: 0x00000000 > [ 2.061906] cherryview-pinctrl INT33FF:02: INTMASK1: 0x00000000 > [ 2.062116] cherryview-pinctrl INT33FF:03: INTMASK0: 0x00000000 > [ 2.062956] cherryview-pinctrl INT33FF:03: INTMASK1: 0x00000000 > > w/o printk_ratelimit(): > http://pastebin.com/dLDELDB4 > > The main difference is the intmask turns to 0x4 on pin 75 and 0x0 > afterwards for INT33FF:00. And same thing happened with :01 on pin 25 OK, I see what is going on now. When I changed handle_simple_irq to handle_bad_irq, the IRQ core in __irq_do_set_handler() thinks the handler is uninstalled and masks the line. If you change handle_bad_irq to handle_simple_irq, in call to gpiochip_irqchip_add(), does it work then?