From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S936303AbcIUQfN (ORCPT ); Wed, 21 Sep 2016 12:35:13 -0400 Received: from mx1.redhat.com ([209.132.183.28]:40658 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933727AbcIUQfL (ORCPT ); Wed, 21 Sep 2016 12:35:11 -0400 Date: Wed, 21 Sep 2016 18:35:07 +0200 From: Radim =?utf-8?B?S3LEjW3DocWZ?= To: Wanpeng Li Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org, Wanpeng Li , Paolo Bonzini , Wincy Van , Yang Zhang Subject: Re: [PATCH v3] Enable MSR-BASED TPR shadow even if APICv is inactive Message-ID: <20160921163507.GA2097@potion> References: <1474424076-6596-1-git-send-email-wanpeng.li@hotmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1474424076-6596-1-git-send-email-wanpeng.li@hotmail.com> X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Wed, 21 Sep 2016 16:35:11 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 2016-09-21 10:14+0800, Wanpeng Li: > From: Wanpeng Li > > I observed that kvmvapic(to optimize flexpriority=N or AMD) is used > to boost TPR access when testing kvm-unit-test/eventinj.flat tpr case > on my haswell desktop (w/ flexpriority, w/o APICv). Commit (8d14695f9542 > x86, apicv: add virtual x2apic support) disable virtual x2apic mode > completely if w/o APICv, and the author also told me that windows guest > can't enter into x2apic mode when he developed the APICv feature several > years ago. However, it is not truth currently, Interrupt Remapping and > vIOMMU is added to qemu and the developers from Intel test windows 8 can > work in x2apic mode w/ Interrupt Remapping enabled recently. > > This patch enables TPR shadow for virtual x2apic mode to boost > windows guest in x2apic mode even if w/o APICv. > > Can pass the kvm-unit-test. > > Suggested-by: Radim Krčmář > Suggested-by: Wincy Van > Cc: Paolo Bonzini > Cc: Radim Krčmář > Cc: Wincy Van > Cc: Yang Zhang > Signed-off-by: Wanpeng Li > --- > v2 -> v3: > * introduce a new set of bitmaps and assign them in vmx_set_msr_bitmap() > v1 -> v2: > * leverage the cached msr bitmap > > diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c > @@ -2518,10 +2520,18 @@ static void vmx_set_msr_bitmap(struct kvm_vcpu *vcpu) > else if (cpu_has_secondary_exec_ctrls() && > (vmcs_read32(SECONDARY_VM_EXEC_CONTROL) & > SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE)) { > - if (is_long_mode(vcpu)) > - msr_bitmap = vmx_msr_bitmap_longmode_x2apic; > - else > - msr_bitmap = vmx_msr_bitmap_legacy_x2apic; > + if (enable_apicv && kvm_vcpu_apicv_active(vcpu)) { > + if (is_long_mode(vcpu)) > + msr_bitmap = vmx_msr_bitmap_longmode_x2apic; > + else > + msr_bitmap = vmx_msr_bitmap_legacy_x2apic; > + } else if ((enable_apicv && !kvm_vcpu_apicv_active(vcpu)) || > + !enable_apicv) { Could only be "else" without if here. I'll change that when refactoring of vmx bitmap handling, posting soon (hopefully). > + if (is_long_mode(vcpu)) > + msr_bitmap = vmx_msr_bitmap_longmode_x2apic_apicv_inactive; > + else > + msr_bitmap = vmx_msr_bitmap_legacy_x2apic_apicv_inactive; > + } > } else { > if (is_long_mode(vcpu)) > msr_bitmap = vmx_msr_bitmap_longmode; > @@ -4678,28 +4688,49 @@ static void vmx_disable_intercept_for_msr(u32 msr, bool longmode_only) > -static void vmx_enable_intercept_msr_read_x2apic(u32 msr) > +static void vmx_enable_intercept_msr_read_x2apic(u32 msr, bool apicv_active) > { > - __vmx_enable_intercept_for_msr(vmx_msr_bitmap_legacy_x2apic, > - msr, MSR_TYPE_R); > - __vmx_enable_intercept_for_msr(vmx_msr_bitmap_longmode_x2apic, > - msr, MSR_TYPE_R); > + if (apicv_active) { > + __vmx_enable_intercept_for_msr(vmx_msr_bitmap_legacy_x2apic, > + msr, MSR_TYPE_R); > + __vmx_enable_intercept_for_msr(vmx_msr_bitmap_longmode_x2apic, > + msr, MSR_TYPE_R); > + } else { > + __vmx_disable_intercept_for_msr(vmx_msr_bitmap_legacy_x2apic_apicv_inactive, > + msr, MSR_TYPE_R); > + __vmx_disable_intercept_for_msr(vmx_msr_bitmap_longmode_x2apic_apicv_inactive, > + msr, MSR_TYPE_R); Pasto here (disable vs. enable). It's not called with !apicv_active and the refactoring will delete the whole function, so Reviwed-by: Radim Krčmář