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Date: Thu, 29 Sep 2016 13:13:34 +0300
From: Mika Westerberg <mika.westerberg@linux.intel.com>
To: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Cc: linux-kernel@vger.kernel.org, Lee Jones <lee.jones@linaro.org>,
        Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
        Xiang A Wang <xiang.a.wang@intel.com>
Subject: Re: [PATCH] mfd: lpss: Fix Intel Kaby Lake PCH-H properties
Message-ID: <20160929101334.GM1218@lahna.fi.intel.com>
References: <20160929095939.10236-1-jarkko.nikula@linux.intel.com>
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On Thu, Sep 29, 2016 at 12:59:39PM +0300, Jarkko Nikula wrote:
> There are a few issues on Intel Kaby Lake PCH-H properties added by
> commit a6a576b78e09 ("mfd: lpss: Add Intel Kaby Lake PCH-H PCI IDs"):
> 
> - Input clock of I2C controller on Intel Kaby Lake PCH-H is 120 MHz not
>   133 MHz. This was probably copy-paste error from Intel Broxton I2C
>   properties.
> - There is no default I2C SDA hold time specified which is used when
>   ACPI doesn't provide it. I got information from Windows driver team
>   that Kaby Lake PCH-H can use the same configuration than Intel
>   Sunrisepoint PCH.
> - Common HS-UART properties are not used.
> 
> Fix these by reusing the Sunrisepoint properties on Kaby Lake PCH-H.
> 
> Fixes: a6a576b78e09 ("mfd: lpss: Add Intel Kaby Lake PCH-H PCI IDs")
> Reported-by: Xiang A Wang <xiang.a.wang@intel.com>
> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>

Thanks for fixing this!

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>