From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755565AbcI2QRt (ORCPT ); Thu, 29 Sep 2016 12:17:49 -0400 Received: from bombadil.infradead.org ([198.137.202.9]:34916 "EHLO bombadil.infradead.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755084AbcI2QRm (ORCPT ); Thu, 29 Sep 2016 12:17:42 -0400 Date: Thu, 29 Sep 2016 18:17:38 +0200 From: Peter Zijlstra To: Will Deacon Cc: "Paul E. McKenney" , linux-kernel@vger.kernel.org, mingo@kernel.org, dhowells@redhat.com, stern@rowland.harvard.edu Subject: Re: [PATCH locking/Documentation 1/2] Add note of release-acquire store vulnerability Message-ID: <20160929161738.GC5016@twins.programming.kicks-ass.net> References: <20160929155401.GA5097@linux.vnet.ibm.com> <20160929155817.GB5016@twins.programming.kicks-ass.net> <20160929160307.GT13862@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20160929160307.GT13862@arm.com> User-Agent: Mutt/1.5.23.1 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Sep 29, 2016 at 05:03:08PM +0100, Will Deacon wrote: > On Thu, Sep 29, 2016 at 05:58:17PM +0200, Peter Zijlstra wrote: > > On Thu, Sep 29, 2016 at 08:54:01AM -0700, Paul E. McKenney wrote: > > > If two processes are related by a RELEASE+ACQUIRE pair, ordering can be > > > broken if a third process overwrites the value written by the RELEASE > > > operation before the ACQUIRE operation has a chance of reading it. > > > This commit therefore updates the documentation to call this vulnerability > > > out explicitly. > > > > > > Reported-by: Alan Stern > > > Signed-off-by: Paul E. McKenney > > > > > + However, please note that a chain of RELEASE+ACQUIRE pairs may be > > > + broken by a store by another thread that overwrites the RELEASE > > > + operation's store before the ACQUIRE operation's read. > > > > This is the powerpc lwsync quirk, right? Where the barrier disappears > > when it looses the store. > > > > Or is there more to it? Its not entirely clear from the Changelog, which > > I feel should describe the reason for the behaviour. > > If I've groked it correctly, it's for cases like: > > > PO: > Wx=1 > WyRel=1 > > P1: > Wy=2 > > P2: > RyAcq=2 > Rx=0 > > Final value of y is 2. > > > This is permitted on arm64. If you make P1's store a store-release, then > it's forbidden, but I suspect that's not generally true of the kernel > memory model. Right, I think that on PowerPC, even if P1 does store-release you can still get this, since the two stores conflict one can loose out, and the lwsync associated with the loosing store gets removed along with it. So yes, I think this needs more clarification.