Re: [PATCH 20/57] perf c2c report: Add dcacheline dimension key

[Arnaldo Carvalho de Melo <acme@kernel.org>]

Em Wed, Oct 05, 2016 at 03:09:29PM +0200, Jiri Olsa escreveu:
> On Wed, Oct 05, 2016 at 02:45:37PM +0200, Jiri Olsa wrote:
> 
> SNIP
> 
> > > > +
> > > > +	if (he->mem_info)
> > > > +		addr = cl_address(he->mem_info->daddr.addr);
> > > > +
> > > > +	return snprintf(hpp->buf, hpp->size, "%*s", width, hex_str(addr));
> > > 
> > > So here you get that static buffer and then truncate it? Wouldn't the
> > > perf_hpp stuff take care of this? Can't we stop using that static buffer
> > > and this truncation at such a level?
> > 
> > I think we need to cut it on this level, but I actualy might recall some
> > change you did for perf_hpp to cut this on column width later on?
> > 
> > I'll check on that..
> 
> ok, so it's cut later on, but it allows only for left-side alignment
> while we use the right-side one
> 
> if I leave it on perf_hpp to deal with it I end up with following output:
> (check the Cacheline column)

Which is not _that_ bad, I guess it gets like that because we expect
kernel addresses as well (longer)? 

[root@jouet ~]# grep icmp_rcv /proc/kallsyms  | cut -d' ' -f 1 | wc -c
17
[root@jouet ~]# echo -n .................. | wc -c
18
[root@jouet ~]# 

How to indicate to the hpp code that we want right alignment? Namhyung?

> 
> #                              Total      Rmt  ----- LLC Load Hitm -----  ---- Store Reference ----  --- Load Dram ----      LLC    Total  ----- Core Load Hit 
> # Index           Cacheline  records     Hitm    Total      Lcl      Rmt    Total    L1Hit   L1Miss       Lcl       Rmt  Ld Miss    Loads       FB       L1    
> # .....  ..................  .......  .......  .......  .......  .......  .......  .......  .......  ........  ........  .......  .......  .......  .......  ..
> #
>       0  0x3d2e300               273    0.53%       44       22       22       40       40        0         0         0       22      233      107       78    
>       1  0x3d001c0                68    0.51%       22        1       21        2        2        0         0         2       25       66       30        7    
>       2  0x3d00200               165    0.48%       22        2       20       20       20        0         0         0       20      145       89       34    
>       3  0x3d5ca80                22    0.41%       19        2       17        3        3        0         0         0       17       19        0        0    
> 
> 
> while current code does:
> 
> #                              Total      Rmt  ----- LLC Load Hitm -----  ---- Store Reference ----  --- Load Dram ----      LLC    Total  ----- Core Load Hit 
> # Index           Cacheline  records     Hitm    Total      Lcl      Rmt    Total    L1Hit   L1Miss       Lcl       Rmt  Ld Miss    Loads       FB       L1    
> # .....  ..................  .......  .......  .......  .......  .......  .......  .......  .......  ........  ........  .......  .......  .......  .......  ..
> #
>       0           0x3d2e300      273    0.53%       44       22       22       40       40        0         0         0       22      233      107       78    
>       1           0x3d001c0       68    0.51%       22        1       21        2        2        0         0         2       25       66       30        7    
>       2           0x3d00200      165    0.48%       22        2       20       20       20        0         0         0       20      145       89       34    
>       3           0x3d5ca80       22    0.41%       19        2       17        3        3        0         0         0       17       19        0        0    
> 
> 
> I'll make the snprintf/scnprintf replacement
> based on your acme/tmp.perf/c2c.2

Thanks,
 
> thanks,
> jirka