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Date: Mon, 10 Oct 2016 14:19:02 +0100
From: Will Deacon <will.deacon@arm.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: Michael Ellerman <mpe@ellerman.id.au>, Jiri Olsa <jolsa@redhat.com>,
        Michael Neuling <mikey@neuling.org>, Paul Mackerras <paulus@samba.org>,
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        Ingo Molnar <mingo@kernel.org>,
        Alexander Shishkin <alexander.shishkin@linux.intel.com>,
        Jan Stancek <jstancek@redhat.com>
Subject: Re: [PATCH] perf powerpc: Don't call perf_event_disable from atomic
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On Tue, Oct 04, 2016 at 09:06:18AM +0200, Peter Zijlstra wrote:
> On Tue, Oct 04, 2016 at 03:29:33PM +1100, Michael Ellerman wrote:
> > Peter Zijlstra <peterz@infradead.org> writes:
> > > So it would be good to also explain why PPC needs this in the first
> > > place.
> > 
> > Unfortunately I don't really know the code, and the original author is AWOL.
> > 
> > But AFAICS perf_event_disable() is only called here:
> > 
> > 	if (!stepped) {
> > 		WARN(1, "Unable to handle hardware breakpoint. Breakpoint at "
> > 			"0x%lx will be disabled.", info->address);
> > 		perf_event_disable(bp);
> > 		goto out;
> > 	}
> > 
> > Which is where we cope with the possibility that we couldn't emulate the
> > instruction that hit the breakpoint. Seems that is not an issue on x86,
> > or it's handled elsewhere?
> 
> I don't think x86 ever needs to emulate things on hw breakpoint
> (although I could be mistaken), but I would expect ARM to maybe need
> so, and I couldn't find a disable there either.
> 
> Will?

We don't do any emulation, so no need for us to call perf_event_disable
in the hw_breakpoint "overflow" path. We do play some awful games to
fake up a single-step, but I don't think perf core needs to care about
it.

Will