From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
To: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: linux-usb@vger.kernel.org, Arnd Bergmann <arnd@arndb.de>,
Icenowy Zheng <icenowy@aosc.xyz>,
Alan Stern <stern@rowland.harvard.edu>,
linux-kernel@vger.kernel.org, Tony Prisk <linux@prisktech.co.nz>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] usb: ehci-platform: increase EHCI_MAX_RSTS to 4
Date: Mon, 17 Oct 2016 14:30:43 +0200 [thread overview]
Message-ID: <20161017123043.GA15142@kroah.com> (raw)
In-Reply-To: <1476702719-10337-1-git-send-email-yamada.masahiro@socionext.com>
On Mon, Oct 17, 2016 at 08:11:59PM +0900, Masahiro Yamada wrote:
> Socionext LD11 SoC (arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi)
> needs to handle 4 reset lines for EHCI.
Why? What makes it different from other EHCI implementations?
thanks,
greg k-h
next prev parent reply other threads:[~2016-10-17 12:30 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-17 11:11 [PATCH] usb: ehci-platform: increase EHCI_MAX_RSTS to 4 Masahiro Yamada
2016-10-17 12:30 ` Greg Kroah-Hartman [this message]
2016-10-17 12:59 ` Masahiro Yamada
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