* [PATCH] usb: ehci-platform: increase EHCI_MAX_RSTS to 4
@ 2016-10-17 11:11 Masahiro Yamada
2016-10-17 12:30 ` Greg Kroah-Hartman
0 siblings, 1 reply; 3+ messages in thread
From: Masahiro Yamada @ 2016-10-17 11:11 UTC (permalink / raw)
To: linux-usb
Cc: Arnd Bergmann, Icenowy Zheng, Masahiro Yamada, Alan Stern,
linux-kernel, Tony Prisk, Greg Kroah-Hartman, linux-arm-kernel
Socionext LD11 SoC (arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi)
needs to handle 4 reset lines for EHCI.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
drivers/usb/host/ehci-platform.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/host/ehci-platform.c b/drivers/usb/host/ehci-platform.c
index 876dca4..a268d9e 100644
--- a/drivers/usb/host/ehci-platform.c
+++ b/drivers/usb/host/ehci-platform.c
@@ -39,7 +39,7 @@
#define DRIVER_DESC "EHCI generic platform driver"
#define EHCI_MAX_CLKS 4
-#define EHCI_MAX_RSTS 3
+#define EHCI_MAX_RSTS 4
#define hcd_to_ehci_priv(h) ((struct ehci_platform_priv *)hcd_to_ehci(h)->priv)
struct ehci_platform_priv {
--
1.9.1
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH] usb: ehci-platform: increase EHCI_MAX_RSTS to 4
2016-10-17 11:11 [PATCH] usb: ehci-platform: increase EHCI_MAX_RSTS to 4 Masahiro Yamada
@ 2016-10-17 12:30 ` Greg Kroah-Hartman
2016-10-17 12:59 ` Masahiro Yamada
0 siblings, 1 reply; 3+ messages in thread
From: Greg Kroah-Hartman @ 2016-10-17 12:30 UTC (permalink / raw)
To: Masahiro Yamada
Cc: linux-usb, Arnd Bergmann, Icenowy Zheng, Alan Stern, linux-kernel,
Tony Prisk, linux-arm-kernel
On Mon, Oct 17, 2016 at 08:11:59PM +0900, Masahiro Yamada wrote:
> Socionext LD11 SoC (arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi)
> needs to handle 4 reset lines for EHCI.
Why? What makes it different from other EHCI implementations?
thanks,
greg k-h
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] usb: ehci-platform: increase EHCI_MAX_RSTS to 4
2016-10-17 12:30 ` Greg Kroah-Hartman
@ 2016-10-17 12:59 ` Masahiro Yamada
0 siblings, 0 replies; 3+ messages in thread
From: Masahiro Yamada @ 2016-10-17 12:59 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: Arnd Bergmann, linux-usb, Linux Kernel Mailing List, Tony Prisk,
Alan Stern, Icenowy Zheng, linux-arm-kernel
Hi Greg,
2016-10-17 21:30 GMT+09:00 Greg Kroah-Hartman <gregkh@linuxfoundation.org>:
> On Mon, Oct 17, 2016 at 08:11:59PM +0900, Masahiro Yamada wrote:
>> Socionext LD11 SoC (arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi)
>> needs to handle 4 reset lines for EHCI.
>
> Why? What makes it different from other EHCI implementations?
>
> thanks,
>
> greg k-h
This is a generic EHCI driver, but the number of clocks/resets
are SoC-specific.
The following patch you picked up will remind you something?
commit 73577d61799e8d8bb7d69a9acdc54923e5998138
Author: Icenowy Zheng <icenowy@aosc.xyz>
Date: Fri Aug 12 11:06:22 2016 +0800
ehci-platform: add the max clock number to 4
Allwinner A64 EHCI requires 4 clocks to be enabled.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
--
Best Regards
Masahiro Yamada
^ permalink raw reply [flat|nested] 3+ messages in thread
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2016-10-17 11:11 [PATCH] usb: ehci-platform: increase EHCI_MAX_RSTS to 4 Masahiro Yamada
2016-10-17 12:30 ` Greg Kroah-Hartman
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