[PATCH 25/52] perf c2c report: Add dram related sort keys

Arnaldo Carvalho de Melo
2016-10-20T15:05:04Z

They are to be displayed in the main cachelines overall output:

dram_lcl, dram_rmt

They display DRAM rmt/lcl access numbers for specific cacheline.

Signed-off-by: Jiri Olsa <jolsa@kernel.org>
Cc: Andi Kleen <andi@firstfloor.org>
Cc: David Ahern <dsahern@gmail.com>
Cc: Don Zickus <dzickus@redhat.com>
Cc: Joe Mario <jmario@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/n/tip-tl3qqi9ehk6g1fla4z7y0ykd@git.kernel.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
---
tools/perf/builtin-c2c.c | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)

diff --git a/tools/perf/builtin-c2c.c b/tools/perf/builtin-c2c.c
index bf4859fecc19..c718d8b553ce 100644
--- a/tools/perf/builtin-c2c.c
+++ b/tools/perf/builtin-c2c.c
@@ -807,6 +807,9 @@ percent_stores_l1miss_cmp(struct perf_hpp_fmt *fmt __maybe_unused,
return per_left - per_right;
}

+STAT_FN(lcl_dram)
+STAT_FN(rmt_dram)
+
#define HEADER_LOW(__h) \
{ \
.line[1] = { \
@@ -1055,6 +1058,22 @@ static struct c2c_dimension dim_percent_stores_l1miss = {
.width = 7,
};

+static struct c2c_dimension dim_dram_lcl = {
+ .header = HEADER_SPAN("--- Load Dram ----", "Lcl", 1),
+ .name = "dram_lcl",
+ .cmp = lcl_dram_cmp,
+ .entry = lcl_dram_entry,
+ .width = 8,
+};
+
+static struct c2c_dimension dim_dram_rmt = {
+ .header = HEADER_SPAN_LOW("Rmt"),
+ .name = "dram_rmt",
+ .cmp = rmt_dram_cmp,
+ .entry = rmt_dram_entry,
+ .width = 8,
+};
+
static struct c2c_dimension *dimensions[] = {
&dim_dcacheline,
&dim_offset,
@@ -1082,6 +1101,8 @@ static struct c2c_dimension *dimensions[] = {
&dim_percent_lcl_hitm,
&dim_percent_stores_l1hit,
&dim_percent_stores_l1miss,
+ &dim_dram_lcl,
+ &dim_dram_rmt,
NULL,
};

--
2.7.4