From: Bin Gao <bin.gao@linux.intel.com>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@redhat.com>, H Peter Anvin <hpa@zytor.com>,
"x86@kernel.org Peter Zijlstra" <peterz@infradead.org>,
linux-kernel@vger.kernel.org, Bin Gao <bin.gao@intel.com>
Subject: Re: Re: [PATCH 1/2] x86/tsc: add X86_FEATURE_TSC_KNOWN_FREQ flag
Date: Thu, 10 Nov 2016 14:51:47 -0800 [thread overview]
Message-ID: <20161110225147.GA217763@worksta> (raw)
In-Reply-To: <4460FA1017EA3844B646E90DA4E984057E2ECB7C@ORSMSX112.amr.corp.intel.com>
> > --- a/arch/x86/kernel/tsc.c
> > +++ b/arch/x86/kernel/tsc.c
> > @@ -1283,10 +1283,10 @@ static int __init init_tsc_clocksource(void)
> > clocksource_tsc.flags |= CLOCK_SOURCE_SUSPEND_NONSTOP;
> >
> > /*
> > - * Trust the results of the earlier calibration on systems
> > - * exporting a reliable TSC.
> > + * When TSC frequency is known (generally got by MSR or CPUID), we skip
> > + * the refined calibration and directly register it as a clocksource.
> > */
> > - if (boot_cpu_has(X86_FEATURE_TSC_RELIABLE)) {
> > + if (boot_cpu_has(X86_FEATURE_TSC_KNOWN_FREQ)) {
>
> This causes a regression, because with only this patch applied the architectures which use the reliable flag for this today are not longer taking this path.
>
> The proper thing to do here is to make this:
>
> if (boot_cpu_has(X86_FEATURE_TSC_RELIABLE) ||
> boot_cpu_has(X86_FEATURE_TSC_KNOWN_FREQ)) {
>
> and remove the RELIABLE flag ckeck after the existing users are converted.
I Will fix this in next revision.
> Thanks,
>
> tglx
>
next prev parent reply other threads:[~2016-11-10 22:45 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-01 17:14 [PATCH 0/2] x86/tsc: split X86_FEATURE_TSC_RELIABLE into two Bin Gao
2016-11-01 17:14 ` [PATCH 1/2] x86/tsc: add X86_FEATURE_TSC_KNOWN_FREQ flag Bin Gao
2016-11-09 21:09 ` Thomas Gleixner
[not found] ` <4460FA1017EA3844B646E90DA4E984057E2ECB7C@ORSMSX112.amr.corp.intel.com>
2016-11-10 22:51 ` Bin Gao [this message]
2016-11-01 17:14 ` [PATCH 2/2] x86: use KNOWN_FREQ and RELIABLE TSC flags on certain processors/SoCs Bin Gao
2016-11-09 21:25 ` Thomas Gleixner
[not found] ` <4460FA1017EA3844B646E90DA4E984057E2ECB85@ORSMSX112.amr.corp.intel.com>
2016-11-10 23:20 ` Bin Gao
2016-11-10 23:26 ` Thomas Gleixner
2016-11-11 0:06 ` Bin Gao
2016-11-11 0:01 ` Thomas Gleixner
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20161110225147.GA217763@worksta \
--to=bin.gao@linux.intel.com \
--cc=bin.gao@intel.com \
--cc=hpa@zytor.com \
--cc=linux-kernel@vger.kernel.org \
--cc=mingo@redhat.com \
--cc=peterz@infradead.org \
--cc=tglx@linutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).