From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: x86@kernel.org, Peter Zijlstra <peterz@infradead.org>,
Borislav Petkov <bp@alien8.de>,
Bruce Schlobohm <bruce.schlobohm@intel.com>,
Roland Scheidegger <rscheidegger_lists@hispeed.ch>,
Kevin Stanton <kevin.b.stanton@intel.com>,
Allen Hung <allen_hung@dell.com>
Subject: [patch 1/2] x86/tsc: Validate TSC_ADJUST after resume
Date: Tue, 13 Dec 2016 13:14:17 -0000 [thread overview]
Message-ID: <20161213131211.317654500@linutronix.de> (raw)
In-Reply-To: 20161213131115.764824574@linutronix.de
[-- Attachment #1: x86-tsc--Validate-TSC_ADJUST-after-resume.patch --]
[-- Type: text/plain, Size: 3313 bytes --]
Some 'feature' BIOSes fiddle with the TSC_ADJUST register during
suspend/resume which renders the TSC unusable.
Add sanity checks into the resume path and restore the
original value if it was adjusted.
Reported-by: Roland Scheidegger <rscheidegger_lists@hispeed.ch>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
arch/x86/include/asm/tsc.h | 4 ++--
arch/x86/kernel/process.c | 2 +-
arch/x86/kernel/tsc.c | 6 ++++++
arch/x86/kernel/tsc_sync.c | 6 +++---
arch/x86/power/cpu.c | 1 +
5 files changed, 13 insertions(+), 6 deletions(-)
--- a/arch/x86/include/asm/tsc.h
+++ b/arch/x86/include/asm/tsc.h
@@ -47,12 +47,12 @@ extern int tsc_clocksource_reliable;
*/
#ifdef CONFIG_X86_TSC
extern bool tsc_store_and_check_tsc_adjust(void);
-extern void tsc_verify_tsc_adjust(void);
+extern void tsc_verify_tsc_adjust(bool resume);
extern void check_tsc_sync_source(int cpu);
extern void check_tsc_sync_target(void);
#else
static inline bool tsc_store_and_check_tsc_adjust(void) { return false; }
-static inline void tsc_verify_tsc_adjust(void) { }
+static inline void tsc_verify_tsc_adjust(bool resume) { }
static inline void check_tsc_sync_source(int cpu) { }
static inline void check_tsc_sync_target(void) { }
#endif
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -277,7 +277,7 @@ void exit_idle(void)
void arch_cpu_idle_enter(void)
{
- tsc_verify_tsc_adjust();
+ tsc_verify_tsc_adjust(false);
local_touch_nmi();
enter_idle();
}
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -1080,6 +1080,11 @@ static void detect_art(void)
static struct clocksource clocksource_tsc;
+static void tsc_resume(struct clocksource *cs)
+{
+ tsc_verify_tsc_adjust(true);
+}
+
/*
* We used to compare the TSC to the cycle_last value in the clocksource
* structure to avoid a nasty time-warp. This can be observed in a
@@ -1112,6 +1117,7 @@ static struct clocksource clocksource_ts
.flags = CLOCK_SOURCE_IS_CONTINUOUS |
CLOCK_SOURCE_MUST_VERIFY,
.archdata = { .vclock_mode = VCLOCK_TSC },
+ .resume = tsc_resume,
};
void mark_tsc_unstable(char *reason)
--- a/arch/x86/kernel/tsc_sync.c
+++ b/arch/x86/kernel/tsc_sync.c
@@ -30,7 +30,7 @@ struct tsc_adjust {
static DEFINE_PER_CPU(struct tsc_adjust, tsc_adjust);
-void tsc_verify_tsc_adjust(void)
+void tsc_verify_tsc_adjust(bool resume)
{
struct tsc_adjust *adj = this_cpu_ptr(&tsc_adjust);
s64 curval;
@@ -39,7 +39,7 @@ void tsc_verify_tsc_adjust(void)
return;
/* Rate limit the MSR check */
- if (time_before(jiffies, adj->nextcheck))
+ if (!resume && time_before(jiffies, adj->nextcheck))
return;
adj->nextcheck = jiffies + HZ;
@@ -51,7 +51,7 @@ void tsc_verify_tsc_adjust(void)
/* Restore the original value */
wrmsrl(MSR_IA32_TSC_ADJUST, adj->adjusted);
- if (!adj->warned) {
+ if (!adj->warned || resume) {
pr_warn(FW_BUG "TSC ADJUST differs: CPU%u %lld --> %lld. Restoring\n",
smp_processor_id(), adj->adjusted, curval);
adj->warned = true;
--- a/arch/x86/power/cpu.c
+++ b/arch/x86/power/cpu.c
@@ -256,6 +256,7 @@ static void notrace __restore_processor_
mtrr_bp_restore();
perf_restore_debug_store();
msr_restore_context(ctxt);
+ tsc_verify_tsc_adjust(true);
}
/* Needed by apm.c */
next prev parent reply other threads:[~2016-12-13 13:17 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-13 13:14 [patch 0/2] tsc/adjust: Cure suspend/resume issues and prevent TSC deadline timer irq storm Thomas Gleixner
2016-12-13 13:14 ` [patch 2/2] x86/tsc: Force TSC_ADJUST register to value >= zero Thomas Gleixner
2016-12-13 13:43 ` Peter Zijlstra
2016-12-13 15:49 ` Thomas Gleixner
2016-12-15 10:53 ` [tip:x86/timers] " tip-bot for Thomas Gleixner
2016-12-16 11:46 ` [patch 2/2] " Thomas Gleixner
2016-12-16 11:52 ` Ingo Molnar
2016-12-16 11:53 ` Thomas Gleixner
2016-12-16 13:33 ` Thomas Gleixner
2016-12-13 13:14 ` Thomas Gleixner [this message]
2016-12-13 13:22 ` [patch 1/2] x86/tsc: Validate TSC_ADJUST after resume Peter Zijlstra
2016-12-13 13:23 ` Thomas Gleixner
2016-12-15 10:52 ` [tip:x86/timers] " tip-bot for Thomas Gleixner
2016-12-13 16:34 ` [patch 0/2] tsc/adjust: Cure suspend/resume issues and prevent TSC deadline timer irq storm Roland Scheidegger
2016-12-13 16:46 ` Thomas Gleixner
2016-12-14 1:36 ` Roland Scheidegger
2016-12-14 7:31 ` Thomas Gleixner
2016-12-14 20:59 ` Thomas Gleixner
2016-12-14 21:40 ` Thomas Gleixner
2016-12-14 22:54 ` Roland Scheidegger
2016-12-15 9:31 ` Thomas Gleixner
2017-01-26 23:40 ` Stanton, Kevin B
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