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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: ayaka <ayaka@soulik.info>
Cc: dri-devel@lists.freedesktop.org, randy.li@rock-chips.com,
	linux-kernel@vger.kernel.org, daniel.vetter@intel.com,
	mchehab@kernel.org, linux-media@vger.kernel.org
Subject: Re: [PATCH 1/2] drm_fourcc: Add new P010 video format
Date: Wed, 4 Jan 2017 18:46:49 +0200	[thread overview]
Message-ID: <20170104164649.GL31595@intel.com> (raw)
In-Reply-To: <1f0969b0-31b3-f9ee-653e-3689fe27932d@soulik.info>

On Thu, Jan 05, 2017 at 12:31:27AM +0800, ayaka wrote:
>
>
> On 01/04/2017 11:56 PM, Ville Syrjälä wrote:
> > On Mon, Jan 02, 2017 at 04:50:03PM +0800, Randy Li wrote:
> >> P010 is a planar 4:2:0 YUV with interleaved UV plane, 10 bits
> >> per channel video format. Rockchip's vop support this
> >> video format(little endian only) as the input video format.
> >>
> >> Signed-off-by: Randy Li <ayaka@soulik.info>
> >> ---
> >>   include/uapi/drm/drm_fourcc.h | 1 +
> >>   1 file changed, 1 insertion(+)
> >>
> >> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
> >> index 9e1bb7f..d2721da 100644
> >> --- a/include/uapi/drm/drm_fourcc.h
> >> +++ b/include/uapi/drm/drm_fourcc.h
> >> @@ -119,6 +119,7 @@ extern "C" {
> >>   #define DRM_FORMAT_NV61		fourcc_code('N', 'V', '6', '1') /* 2x1 subsampled Cb:Cr plane */
> >>   #define DRM_FORMAT_NV24		fourcc_code('N', 'V', '2', '4') /* non-subsampled Cr:Cb plane */
> >>   #define DRM_FORMAT_NV42		fourcc_code('N', 'V', '4', '2') /* non-subsampled Cb:Cr plane */
> >> +#define DRM_FORMAT_P010		fourcc_code('P', '0', '1', '0') /* 2x2 subsampled Cr:Cb plane 10 bits per channel */
> > We could use a better description of the format here. IIRC there is
> > 10bits of actual data contained in each 16bits. So there should be a
> > proper comment explaning in which way the bits are stored.
> It is a little hard to describe P010,

/*
 * 2 plane YCbCr
 * index 0 = Y plane, [15:0] Y:X 10:6 little-endian
 * index 1 = Cr:Cb plane, [31:0] Cr:X:Cb:X 10:6:10:6 little-endian
 */

/*
 * 2 plane YCbCr
 * index 0 = Y plane, [15:0] Y 16 little-endian
 * index 1 = Cr:Cb plane, [31:0] Cr:Cb 16:16 little-endian
 */

or something like that (not 100% sure I got the order of bits and
whatnot correct).

-- 
Ville Syrjälä
Intel OTC

  reply	other threads:[~2017-01-04 16:47 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-02  8:50 [PATCH 0/2] Add pixel format for 10 bits YUV video Randy Li
2017-01-02  8:50 ` [PATCH 1/2] drm_fourcc: Add new P010 video format Randy Li
2017-01-03 10:57   ` Daniel Stone
2017-01-04 15:56   ` Ville Syrjälä
2017-01-04 16:31     ` ayaka
2017-01-04 16:46       ` Ville Syrjälä [this message]
2017-01-02  8:50 ` [PATCH 2/2] [media] v4l: Add 10-bits per channel YUV pixel formats Randy Li
2017-01-02  9:10   ` Sakari Ailus
2017-01-02 10:53     ` ayaka
2017-01-02 11:07       ` Sakari Ailus
2017-01-02 13:03         ` ayaka
2017-01-03 10:49           ` Daniel Stone

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