From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751649AbdAMNR7 (ORCPT ); Fri, 13 Jan 2017 08:17:59 -0500 Received: from mail-lf0-f51.google.com ([209.85.215.51]:32825 "EHLO mail-lf0-f51.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751406AbdAMNR5 (ORCPT ); Fri, 13 Jan 2017 08:17:57 -0500 Date: Fri, 13 Jan 2017 13:21:46 +0000 From: Lee Jones To: Andy Shevchenko Cc: linux-kernel@vger.kernel.org, Mika Westerberg Subject: Re: [PATCH v1 1/1] mfd: intel-lpss: Add Intel Gemini Lake PCI IDs Message-ID: <20170113132146.GA6864@dell> References: <20170111121609.10839-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20170111121609.10839-1-andriy.shevchenko@linux.intel.com> User-Agent: Mutt/1.6.2 (2016-07-01) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 11 Jan 2017, Andy Shevchenko wrote: > Intel Gemini Lake is essentially Broxton with different PCI IDs. Add these > new PCI IDs to the list of supported devices. > > Signed-off-by: Mika Westerberg > Signed-off-by: Andy Shevchenko > --- > drivers/mfd/intel-lpss-pci.c | 17 ++++++++++++++++- > 1 file changed, 16 insertions(+), 1 deletion(-) Applied, thanks. > diff --git a/drivers/mfd/intel-lpss-pci.c b/drivers/mfd/intel-lpss-pci.c > index 78dbcf8b0bef..16ffeaeb1385 100644 > --- a/drivers/mfd/intel-lpss-pci.c > +++ b/drivers/mfd/intel-lpss-pci.c > @@ -157,7 +157,22 @@ static const struct pci_device_id intel_lpss_pci_ids[] = { > { PCI_VDEVICE(INTEL, 0x1ac4), (kernel_ulong_t)&bxt_info }, > { PCI_VDEVICE(INTEL, 0x1ac6), (kernel_ulong_t)&bxt_info }, > { PCI_VDEVICE(INTEL, 0x1aee), (kernel_ulong_t)&bxt_uart_info }, > - > + /* GLK */ > + { PCI_VDEVICE(INTEL, 0x31ac), (kernel_ulong_t)&bxt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x31ae), (kernel_ulong_t)&bxt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x31b0), (kernel_ulong_t)&bxt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x31b2), (kernel_ulong_t)&bxt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x31b4), (kernel_ulong_t)&bxt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x31b6), (kernel_ulong_t)&bxt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x31b8), (kernel_ulong_t)&bxt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x31ba), (kernel_ulong_t)&bxt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x31bc), (kernel_ulong_t)&bxt_uart_info }, > + { PCI_VDEVICE(INTEL, 0x31be), (kernel_ulong_t)&bxt_uart_info }, > + { PCI_VDEVICE(INTEL, 0x31c0), (kernel_ulong_t)&bxt_uart_info }, > + { PCI_VDEVICE(INTEL, 0x31ee), (kernel_ulong_t)&bxt_uart_info }, > + { PCI_VDEVICE(INTEL, 0x31c2), (kernel_ulong_t)&bxt_info }, > + { PCI_VDEVICE(INTEL, 0x31c4), (kernel_ulong_t)&bxt_info }, > + { PCI_VDEVICE(INTEL, 0x31c6), (kernel_ulong_t)&bxt_info }, > /* APL */ > { PCI_VDEVICE(INTEL, 0x5aac), (kernel_ulong_t)&apl_i2c_info }, > { PCI_VDEVICE(INTEL, 0x5aae), (kernel_ulong_t)&apl_i2c_info }, -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog