From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750924AbdAOHLf (ORCPT ); Sun, 15 Jan 2017 02:11:35 -0500 Received: from mail-wm0-f66.google.com ([74.125.82.66]:34277 "EHLO mail-wm0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750881AbdAOHLd (ORCPT ); Sun, 15 Jan 2017 02:11:33 -0500 Date: Sun, 15 Jan 2017 08:11:23 +0100 From: Ingo Molnar To: "Paul E. McKenney" Cc: linux-kernel@vger.kernel.org, jiangshanlai@gmail.com, dipankar@in.ibm.com, akpm@linux-foundation.org, mathieu.desnoyers@efficios.com, josh@joshtriplett.org, tglx@linutronix.de, peterz@infradead.org, rostedt@goodmis.org, dhowells@redhat.com, edumazet@google.com, dvhart@linux.intel.com, fweisbec@gmail.com, oleg@redhat.com, bobby.prani@gmail.com, will.deacon@arm.com, boqun.feng@linux.vnet.ibm.com, linuxppc-dev@lists.ozlabs.org, Peter Zijlstra Subject: Re: [PATCH tip/core/rcu 2/3] srcu: Force full grace-period ordering Message-ID: <20170115071123.GB26581@gmail.com> References: <20170114091941.GA22961@linux.vnet.ibm.com> <1484385601-23379-2-git-send-email-paulmck@linux.vnet.ibm.com> <20170114093550.GB14970@gmail.com> <20170114195417.GW5238@linux.vnet.ibm.com> <20170114214159.GA7098@linux.vnet.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20170114214159.GA7098@linux.vnet.ibm.com> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org * Paul E. McKenney wrote: > diff --git a/include/linux/rcupdate.h b/include/linux/rcupdate.h > index 357b32aaea48..5fdfe874229e 100644 > --- a/include/linux/rcupdate.h > +++ b/include/linux/rcupdate.h > @@ -1175,11 +1175,11 @@ do { \ > * if the UNLOCK and LOCK are executed by the same CPU or if the > * UNLOCK and LOCK operate on the same lock variable. > */ > -#ifdef CONFIG_PPC > +#ifdef CONFIG_ARCH_WEAK_RELACQ > #define smp_mb__after_unlock_lock() smp_mb() /* Full ordering for lock. */ > -#else /* #ifdef CONFIG_PPC */ > +#else /* #ifdef CONFIG_ARCH_WEAK_RELACQ */ > #define smp_mb__after_unlock_lock() do { } while (0) > -#endif /* #else #ifdef CONFIG_PPC */ > +#endif /* #else #ifdef CONFIG_ARCH_WEAK_RELACQ */ > > So at the risk of sounding totally pedantic, why not structure it like the existing smp_mb__before/after*() primitives in barrier.h? That allows asm-generic/barrier.h to pick up the definition - for example in the case of smp_acquire__after_ctrl_dep() we do: #ifndef smp_acquire__after_ctrl_dep #define smp_acquire__after_ctrl_dep() smp_rmb() #endif Which allows Tile to relax it: arch/tile/include/asm/barrier.h:#define smp_acquire__after_ctrl_dep() barrier() I.e. I'd move the API definition out of rcupdate.h and into barrier.h - even though tree-RCU is the only user of this barrier type. Thanks, Ingo