From: Will Deacon <will.deacon@arm.com>
To: He Kuang <hekuang@huawei.com>
Cc: peterz@infradead.org, mingo@redhat.com, acme@kernel.org,
alexander.shishkin@linux.intel.com, jolsa@redhat.com,
mhiramat@kernel.org, wangnan0@huawei.com,
bintian.wang@huawei.com, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/2] perf tools: Introduce regs_query_register_offset() for arm64
Date: Tue, 24 Jan 2017 18:25:18 +0000 [thread overview]
Message-ID: <20170124182515.GA26744@arm.com> (raw)
In-Reply-To: <20170124103015.1936-3-hekuang@huawei.com>
On Tue, Jan 24, 2017 at 10:30:15AM +0000, He Kuang wrote:
> Since HAVE_KPROBES can be enabled in arm64, this patch introduces
> regs_query_register_offset() to convert register name to offset for
> arm64, so the BPF prologue feature is ready to use.
>
> This patch also changes the 'dwarfnum' to 'offset' in register table,
> so the related functions are consistent with x86.
>
> Signed-off-by: He Kuang <hekuang@huawei.com>
> ---
> tools/perf/arch/arm64/Makefile | 1 +
> tools/perf/arch/arm64/util/dwarf-regs.c | 123 ++++++++++++++++++--------------
> 2 files changed, 71 insertions(+), 53 deletions(-)
It would've been nice to have been cc'd on this. In future, please at least
cc linux-arm-kernel for patches directly changing arm/arm64 code.
> diff --git a/tools/perf/arch/arm64/Makefile b/tools/perf/arch/arm64/Makefile
> index 18b1351..eebe1ec 100644
> --- a/tools/perf/arch/arm64/Makefile
> +++ b/tools/perf/arch/arm64/Makefile
> @@ -2,3 +2,4 @@ ifndef NO_DWARF
> PERF_HAVE_DWARF_REGS := 1
> endif
> PERF_HAVE_JITDUMP := 1
> +PERF_HAVE_ARCH_REGS_QUERY_REGISTER_OFFSET := 1
> diff --git a/tools/perf/arch/arm64/util/dwarf-regs.c b/tools/perf/arch/arm64/util/dwarf-regs.c
> index d49efeb..6427ce0 100644
> --- a/tools/perf/arch/arm64/util/dwarf-regs.c
> +++ b/tools/perf/arch/arm64/util/dwarf-regs.c
> @@ -9,72 +9,89 @@
> */
>
> #include <stddef.h>
> +#include <linux/ptrace.h> /* for struct user_pt_regs */
> +#include <errno.h> /* for EINVAL */
> +#include <string.h> /* for strcmp */
> #include <dwarf-regs.h>
>
> -struct pt_regs_dwarfnum {
> +struct pt_regs_offset {
> const char *name;
> - unsigned int dwarfnum;
> + int offset;
> };
>
> -#define STR(s) #s
> -#define REG_DWARFNUM_NAME(r, num) {.name = r, .dwarfnum = num}
> -#define GPR_DWARFNUM_NAME(num) \
> - {.name = STR(%x##num), .dwarfnum = num}
> -#define REG_DWARFNUM_END {.name = NULL, .dwarfnum = 0}
> -
> /*
> * Reference:
> * http://infocenter.arm.com/help/topic/com.arm.doc.ihi0057b/IHI0057B_aadwarf64.pdf
> */
> -static const struct pt_regs_dwarfnum regdwarfnum_table[] = {
> - GPR_DWARFNUM_NAME(0),
> - GPR_DWARFNUM_NAME(1),
> - GPR_DWARFNUM_NAME(2),
> - GPR_DWARFNUM_NAME(3),
> - GPR_DWARFNUM_NAME(4),
> - GPR_DWARFNUM_NAME(5),
> - GPR_DWARFNUM_NAME(6),
> - GPR_DWARFNUM_NAME(7),
> - GPR_DWARFNUM_NAME(8),
> - GPR_DWARFNUM_NAME(9),
> - GPR_DWARFNUM_NAME(10),
> - GPR_DWARFNUM_NAME(11),
> - GPR_DWARFNUM_NAME(12),
> - GPR_DWARFNUM_NAME(13),
> - GPR_DWARFNUM_NAME(14),
> - GPR_DWARFNUM_NAME(15),
> - GPR_DWARFNUM_NAME(16),
> - GPR_DWARFNUM_NAME(17),
> - GPR_DWARFNUM_NAME(18),
> - GPR_DWARFNUM_NAME(19),
> - GPR_DWARFNUM_NAME(20),
> - GPR_DWARFNUM_NAME(21),
> - GPR_DWARFNUM_NAME(22),
> - GPR_DWARFNUM_NAME(23),
> - GPR_DWARFNUM_NAME(24),
> - GPR_DWARFNUM_NAME(25),
> - GPR_DWARFNUM_NAME(26),
> - GPR_DWARFNUM_NAME(27),
> - GPR_DWARFNUM_NAME(28),
> - GPR_DWARFNUM_NAME(29),
> - REG_DWARFNUM_NAME("%lr", 30),
> - REG_DWARFNUM_NAME("%sp", 31),
> - REG_DWARFNUM_END,
> +#define REG_OFFSET_NAME(r) {.name = #r, \
> + .offset = offsetof(struct user_pt_regs, r)}
> +#define REG_OFFSET_END {.name = NULL, .offset = 0}
> +#define GPR_OFFSET_NAME(r) \
> + {.name = "%x" #r, .offset = offsetof(struct user_pt_regs, regs[r])}
> +
> +static const struct pt_regs_offset regoffset_table[] = {
> + GPR_OFFSET_NAME(0),
> + GPR_OFFSET_NAME(1),
> + GPR_OFFSET_NAME(2),
> + GPR_OFFSET_NAME(3),
> + GPR_OFFSET_NAME(4),
> + GPR_OFFSET_NAME(5),
> + GPR_OFFSET_NAME(6),
> + GPR_OFFSET_NAME(7),
> + GPR_OFFSET_NAME(8),
> + GPR_OFFSET_NAME(9),
> + GPR_OFFSET_NAME(10),
> + GPR_OFFSET_NAME(11),
> + GPR_OFFSET_NAME(12),
> + GPR_OFFSET_NAME(13),
> + GPR_OFFSET_NAME(14),
> + GPR_OFFSET_NAME(15),
> + GPR_OFFSET_NAME(16),
> + GPR_OFFSET_NAME(17),
> + GPR_OFFSET_NAME(18),
> + GPR_OFFSET_NAME(19),
> + GPR_OFFSET_NAME(20),
> + GPR_OFFSET_NAME(21),
> + GPR_OFFSET_NAME(22),
> + GPR_OFFSET_NAME(23),
> + GPR_OFFSET_NAME(24),
> + GPR_OFFSET_NAME(25),
> + GPR_OFFSET_NAME(26),
> + GPR_OFFSET_NAME(27),
> + GPR_OFFSET_NAME(28),
> + GPR_OFFSET_NAME(29),
> + GPR_OFFSET_NAME(30),
> + {.name = "lr", .offset = offsetof(struct user_pt_regs, regs[30])},
> + REG_OFFSET_NAME(sp),
Don't sp and lr need the leading '%'?
> + REG_OFFSET_NAME(pc),
> + REG_OFFSET_NAME(pstate),
The AArch64 DWARF spec says that DWARF register 32 is "RESERVED" and
register 33 is the ELR, so these pc/pstate entries are wrong.
However, with those changes, I think this patch can simply be ignored and
mainline is doing the right thing.
Will
next prev parent reply other threads:[~2017-01-24 18:25 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-24 10:30 [PATCH 0/2] Support bpf prologue for arm64 He Kuang
2017-01-24 10:30 ` [PATCH 1/2] perf probe: Fix wrong register name " He Kuang
2017-01-24 19:11 ` Arnaldo Carvalho de Melo
2017-01-25 9:22 ` Will Deacon
2017-01-26 1:24 ` Masami Hiramatsu
2017-01-26 15:28 ` [tip:perf/core] " tip-bot for He Kuang
2017-05-03 8:54 ` [PATCH 1/2] " Pratyush Anand
2017-01-24 10:30 ` [PATCH 2/2] perf tools: Introduce regs_query_register_offset() " He Kuang
2017-01-24 18:25 ` Will Deacon [this message]
2017-01-24 19:09 ` Arnaldo Carvalho de Melo
2017-01-25 7:23 ` [PATCH 2/2 v2] perf tools: Enable bpf prologue " He Kuang
2017-01-25 13:32 ` Will Deacon
2017-01-26 1:49 ` Masami Hiramatsu
2017-01-26 16:52 ` Will Deacon
2017-01-26 19:31 ` Arnaldo Carvalho de Melo
2017-02-03 11:08 ` Hekuang
2017-01-26 1:51 ` Masami Hiramatsu
2017-01-25 7:26 ` [PATCH 2/2] perf tools: Introduce regs_query_register_offset() " Hekuang
2017-01-24 15:56 ` [PATCH 0/2] Support bpf prologue " Arnaldo Carvalho de Melo
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