From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932322AbdA3O75 (ORCPT ); Mon, 30 Jan 2017 09:59:57 -0500 Received: from mail.kernel.org ([198.145.29.136]:46872 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932279AbdA3O7b (ORCPT ); Mon, 30 Jan 2017 09:59:31 -0500 Date: Mon, 30 Jan 2017 11:49:48 -0300 From: Arnaldo Carvalho de Melo To: Ingo Molnar Cc: Arnaldo Carvalho de Melo , linux-kernel@vger.kernel.org, Peter Zijlstra , Namhyung Kim , David Ahern , Jiri Olsa Subject: Re: [PATCH] tools/headers: Sync {tools/,}arch/powerpc/include/uapi/asm/kvm.h, {tools/,}arch/x86/include/asm/cpufeatures.h and {tools/,}arch/arm/include/uapi/asm/kvm.h Message-ID: <20170130144948.GA4546@kernel.org> References: <20170130081131.GA8322@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20170130081131.GA8322@gmail.com> X-Url: http://acmel.wordpress.com User-Agent: Mutt/1.7.1 (2016-10-04) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Em Mon, Jan 30, 2017 at 09:11:31AM +0100, Ingo Molnar escreveu: > > The following upstream headers were updated: > > - The x86 cpufeatures.h file picked up a couple of new feature entries > - The PowerPC and ARM KVM headers picked up new features > > None of which requires changes to perf tooling, so refresh the tooling copy. Thanks, applied. - Arnaldo > Solves these build time warnings: > > Warning: arch/x86/include/asm/cpufeatures.h differs from kernel > Warning: arch/powerpc/include/uapi/asm/kvm.h differs from kernel > Warning: arch/arm/include/uapi/asm/kvm.h differs from kernel > > Cc: Arnaldo Carvalho de Melo > Cc: Peter Zijlstra > Cc: Namhyung Kim > Cc: David Ahern > Cc: Jiri Olsa > Cc: linux-kernel@vger.kernel.org > Signed-off-by: Ingo Molnar > --- > tools/arch/arm/include/uapi/asm/kvm.h | 9 +++++++++ > tools/arch/powerpc/include/uapi/asm/kvm.h | 5 +++++ > tools/arch/x86/include/asm/cpufeatures.h | 12 +++++++++++- > 3 files changed, 25 insertions(+), 1 deletion(-) > > diff --git a/tools/arch/arm/include/uapi/asm/kvm.h b/tools/arch/arm/include/uapi/asm/kvm.h > index a2b3eb313a25..af05f8e0903e 100644 > --- a/tools/arch/arm/include/uapi/asm/kvm.h > +++ b/tools/arch/arm/include/uapi/asm/kvm.h > @@ -84,6 +84,15 @@ struct kvm_regs { > #define KVM_VGIC_V2_DIST_SIZE 0x1000 > #define KVM_VGIC_V2_CPU_SIZE 0x2000 > > +/* Supported VGICv3 address types */ > +#define KVM_VGIC_V3_ADDR_TYPE_DIST 2 > +#define KVM_VGIC_V3_ADDR_TYPE_REDIST 3 > +#define KVM_VGIC_ITS_ADDR_TYPE 4 > + > +#define KVM_VGIC_V3_DIST_SIZE SZ_64K > +#define KVM_VGIC_V3_REDIST_SIZE (2 * SZ_64K) > +#define KVM_VGIC_V3_ITS_SIZE (2 * SZ_64K) > + > #define KVM_ARM_VCPU_POWER_OFF 0 /* CPU is started in OFF state */ > #define KVM_ARM_VCPU_PSCI_0_2 1 /* CPU uses PSCI v0.2 */ > > diff --git a/tools/arch/powerpc/include/uapi/asm/kvm.h b/tools/arch/powerpc/include/uapi/asm/kvm.h > index c93cf35ce379..3603b6f51b11 100644 > --- a/tools/arch/powerpc/include/uapi/asm/kvm.h > +++ b/tools/arch/powerpc/include/uapi/asm/kvm.h > @@ -573,6 +573,10 @@ struct kvm_get_htab_header { > #define KVM_REG_PPC_SPRG9 (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xba) > #define KVM_REG_PPC_DBSR (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xbb) > > +/* POWER9 registers */ > +#define KVM_REG_PPC_TIDR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xbc) > +#define KVM_REG_PPC_PSSCR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xbd) > + > /* Transactional Memory checkpointed state: > * This is all GPRs, all VSX regs and a subset of SPRs > */ > @@ -596,6 +600,7 @@ struct kvm_get_htab_header { > #define KVM_REG_PPC_TM_VSCR (KVM_REG_PPC_TM | KVM_REG_SIZE_U32 | 0x67) > #define KVM_REG_PPC_TM_DSCR (KVM_REG_PPC_TM | KVM_REG_SIZE_U64 | 0x68) > #define KVM_REG_PPC_TM_TAR (KVM_REG_PPC_TM | KVM_REG_SIZE_U64 | 0x69) > +#define KVM_REG_PPC_TM_XER (KVM_REG_PPC_TM | KVM_REG_SIZE_U64 | 0x6a) > > /* PPC64 eXternal Interrupt Controller Specification */ > #define KVM_DEV_XICS_GRP_SOURCES 1 /* 64-bit source attributes */ > diff --git a/tools/arch/x86/include/asm/cpufeatures.h b/tools/arch/x86/include/asm/cpufeatures.h > index 3603556fa0d9..d45ab4b53396 100644 > --- a/tools/arch/x86/include/asm/cpufeatures.h > +++ b/tools/arch/x86/include/asm/cpufeatures.h > @@ -100,11 +100,12 @@ > #define X86_FEATURE_XTOPOLOGY ( 3*32+22) /* cpu topology enum extensions */ > #define X86_FEATURE_TSC_RELIABLE ( 3*32+23) /* TSC is known to be reliable */ > #define X86_FEATURE_NONSTOP_TSC ( 3*32+24) /* TSC does not stop in C states */ > -/* free, was #define X86_FEATURE_CLFLUSH_MONITOR ( 3*32+25) * "" clflush reqd with monitor */ > +#define X86_FEATURE_CPUID ( 3*32+25) /* CPU has CPUID instruction itself */ > #define X86_FEATURE_EXTD_APICID ( 3*32+26) /* has extended APICID (8 bits) */ > #define X86_FEATURE_AMD_DCM ( 3*32+27) /* multi-node processor */ > #define X86_FEATURE_APERFMPERF ( 3*32+28) /* APERFMPERF */ > #define X86_FEATURE_NONSTOP_TSC_S3 ( 3*32+30) /* TSC doesn't stop in S3 state */ > +#define X86_FEATURE_TSC_KNOWN_FREQ ( 3*32+31) /* TSC has known frequency */ > > /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */ > #define X86_FEATURE_XMM3 ( 4*32+ 0) /* "pni" SSE-3 */ > @@ -188,10 +189,14 @@ > > #define X86_FEATURE_CPB ( 7*32+ 2) /* AMD Core Performance Boost */ > #define X86_FEATURE_EPB ( 7*32+ 3) /* IA32_ENERGY_PERF_BIAS support */ > +#define X86_FEATURE_CAT_L3 ( 7*32+ 4) /* Cache Allocation Technology L3 */ > +#define X86_FEATURE_CAT_L2 ( 7*32+ 5) /* Cache Allocation Technology L2 */ > +#define X86_FEATURE_CDP_L3 ( 7*32+ 6) /* Code and Data Prioritization L3 */ > > #define X86_FEATURE_HW_PSTATE ( 7*32+ 8) /* AMD HW-PState */ > #define X86_FEATURE_PROC_FEEDBACK ( 7*32+ 9) /* AMD ProcFeedbackInterface */ > > +#define X86_FEATURE_INTEL_PPIN ( 7*32+14) /* Intel Processor Inventory Number */ > #define X86_FEATURE_INTEL_PT ( 7*32+15) /* Intel Processor Trace */ > #define X86_FEATURE_AVX512_4VNNIW (7*32+16) /* AVX-512 Neural Network Instructions */ > #define X86_FEATURE_AVX512_4FMAPS (7*32+17) /* AVX-512 Multiply Accumulation Single precision */ > @@ -220,11 +225,13 @@ > #define X86_FEATURE_RTM ( 9*32+11) /* Restricted Transactional Memory */ > #define X86_FEATURE_CQM ( 9*32+12) /* Cache QoS Monitoring */ > #define X86_FEATURE_MPX ( 9*32+14) /* Memory Protection Extension */ > +#define X86_FEATURE_RDT_A ( 9*32+15) /* Resource Director Technology Allocation */ > #define X86_FEATURE_AVX512F ( 9*32+16) /* AVX-512 Foundation */ > #define X86_FEATURE_AVX512DQ ( 9*32+17) /* AVX-512 DQ (Double/Quad granular) Instructions */ > #define X86_FEATURE_RDSEED ( 9*32+18) /* The RDSEED instruction */ > #define X86_FEATURE_ADX ( 9*32+19) /* The ADCX and ADOX instructions */ > #define X86_FEATURE_SMAP ( 9*32+20) /* Supervisor Mode Access Prevention */ > +#define X86_FEATURE_AVX512IFMA ( 9*32+21) /* AVX-512 Integer Fused Multiply-Add instructions */ > #define X86_FEATURE_CLFLUSHOPT ( 9*32+23) /* CLFLUSHOPT instruction */ > #define X86_FEATURE_CLWB ( 9*32+24) /* CLWB instruction */ > #define X86_FEATURE_AVX512PF ( 9*32+26) /* AVX-512 Prefetch */ > @@ -278,9 +285,11 @@ > #define X86_FEATURE_AVIC (15*32+13) /* Virtual Interrupt Controller */ > > /* Intel-defined CPU features, CPUID level 0x00000007:0 (ecx), word 16 */ > +#define X86_FEATURE_AVX512VBMI (16*32+ 1) /* AVX512 Vector Bit Manipulation instructions*/ > #define X86_FEATURE_PKU (16*32+ 3) /* Protection Keys for Userspace */ > #define X86_FEATURE_OSPKE (16*32+ 4) /* OS Protection Keys Enable */ > #define X86_FEATURE_AVX512_VPOPCNTDQ (16*32+14) /* POPCNT for vectors of DW/QW */ > +#define X86_FEATURE_RDPID (16*32+ 22) /* RDPID instruction */ > > /* AMD-defined CPU features, CPUID level 0x80000007 (ebx), word 17 */ > #define X86_FEATURE_OVERFLOW_RECOV (17*32+0) /* MCA overflow recovery support */ > @@ -311,4 +320,5 @@ > #define X86_BUG_NULL_SEG X86_BUG(10) /* Nulling a selector preserves the base */ > #define X86_BUG_SWAPGS_FENCE X86_BUG(11) /* SWAPGS without input dep on GS */ > #define X86_BUG_MONITOR X86_BUG(12) /* IPI required to wake up remote CPU */ > +#define X86_BUG_AMD_E400 X86_BUG(13) /* CPU is among the affected by Erratum 400 */ > #endif /* _ASM_X86_CPUFEATURES_H */